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https://github.com/RPCS3/llvm-mirror.git
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d7a8482810
it has before/end body hooks. lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++----------- lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------ lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------ test/CodeGen/XCore/ashr.ll | 2 4 files changed, 48 insertions(+), 146 deletions(-) llvm-svn: 94741
77 lines
1.4 KiB
LLVM
77 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
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define i32 @ashr(i32 %a, i32 %b) {
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%1 = ashr i32 %a, %b
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ret i32 %1
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}
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; CHECK: ashr:
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; CHECK-NEXT: ashr r0, r0, r1
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define i32 @ashri1(i32 %a) {
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%1 = ashr i32 %a, 24
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ret i32 %1
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}
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; CHECK: ashri1:
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; CHECK-NEXT: ashr r0, r0, 24
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define i32 @ashri2(i32 %a) {
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%1 = ashr i32 %a, 31
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ret i32 %1
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}
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; CHECK: ashri2:
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; CHECK-NEXT: ashr r0, r0, 32
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define i32 @f1(i32 %a) {
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%1 = icmp slt i32 %a, 0
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br i1 %1, label %less, label %not_less
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less:
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ret i32 10
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not_less:
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ret i32 17
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}
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; CHECK: f1:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bf r0
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define i32 @f2(i32 %a) {
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%1 = icmp sge i32 %a, 0
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br i1 %1, label %greater, label %not_greater
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greater:
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ret i32 10
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not_greater:
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ret i32 17
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}
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; CHECK: f2:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f3(i32 %a) {
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%1 = icmp slt i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK: f3:
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; CHECK-NEXT: ashr r1, r0, 32
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; CHECK-NEXT: ldc r0, 10
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; CHECK-NEXT: bt r1
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; CHECK: ldc r0, 17
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define i32 @f4(i32 %a) {
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%1 = icmp sge i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK: f4:
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; CHECK-NEXT: ashr r1, r0, 32
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; CHECK-NEXT: ldc r0, 17
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; CHECK-NEXT: bt r1
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; CHECK: ldc r0, 10
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define i32 @f5(i32 %a) {
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%1 = icmp sge i32 %a, 0
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%2 = zext i1 %1 to i32
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ret i32 %2
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}
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; CHECK: f5:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: eq r0, r0, 0
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