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dd29eca4bf
-Don't print the 'x' suffix for the 128-bit reg/mem VEX encoded instructions in Intel syntax. This is consistent with the EVEX versions. -Don't print the 'y' suffix for the 256-bit reg/reg VEX encoded instructions in Intel or AT&T syntax. This is consistent with the EVEX versions. -Allow the 'x' and 'y' suffixes to be used for the reg/mem forms when we're assembling using Intel syntax. -Allow the 'x' and 'y' suffixes on the reg/reg EVEX encoded instructions in Intel or AT&T syntax. This is consistent with what VEX was already allowing. This should fix at least some of PR28850. llvm-svn: 286787
20 lines
481 B
LLVM
20 lines
481 B
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
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; CHECK-LABEL: test1:
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; CHECK: vcvttpd2dq
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; CHECK: ret
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; CHECK-LABEL: test2:
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; CHECK: vcvttpd2dq
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; CHECK: ret
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define <4 x i8> @test1(<4 x double> %d) {
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%c = fptoui <4 x double> %d to <4 x i8>
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ret <4 x i8> %c
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}
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define <4 x i8> @test2(<4 x double> %d) {
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%c = fptosi <4 x double> %d to <4 x i8>
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ret <4 x i8> %c
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}
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