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bfd9be426f
Summary: This suppresses the generation of .Lcfi labels in our textual assembler. It was annoying that this generated cascading .Lcfi labels: llc foo.ll -o - | llvm-mc | llvm-mc After three trips through MCAsmStreamer, we'd have three labels in the output when none are necessary. We should only bother creating the labels and frame data when making a real object file. This supercedes D38605, which moved the entire .seh_ implementation into MCObjectStreamer. This has the advantage that we do more checking when emitting textual assembly, as a minor efficiency cost. Outputting textual assembly is not performance critical, so this shouldn't matter. Reviewers: majnemer, MatzeB Subscribers: qcolombet, nemanjai, javed.absar, eraman, hiraditya, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D38638 llvm-svn: 315259
113 lines
2.8 KiB
LLVM
113 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
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@i = thread_local global i32 15
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@i2 = external thread_local global i32
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define i32 @f1() {
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; X86-LABEL: f1:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl %gs:i@NTPOFF, %eax
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; X86-NEXT: retl
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;
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; X32-LABEL: f1:
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; X32: # BB#0: # %entry
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; X32-NEXT: movl %fs:i@TPOFF, %eax
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; X32-NEXT: retq
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;
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; X64-LABEL: f1:
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; X64: # BB#0: # %entry
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; X64-NEXT: movl %fs:i@TPOFF, %eax
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; X64-NEXT: retq
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entry:
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%tmp1 = load i32, i32* @i
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ret i32 %tmp1
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}
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define i32* @f2() {
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; X86-LABEL: f2:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl %gs:0, %eax
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; X86-NEXT: leal i@NTPOFF(%eax), %eax
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; X86-NEXT: retl
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;
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; X32-LABEL: f2:
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; X32: # BB#0: # %entry
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; X32-NEXT: movl %fs:0, %eax
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; X32-NEXT: leal i@TPOFF(%rax), %eax
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; X32-NEXT: retq
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;
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; X64-LABEL: f2:
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; X64: # BB#0: # %entry
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; X64-NEXT: movq %fs:0, %rax
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; X64-NEXT: leaq i@TPOFF(%rax), %rax
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; X64-NEXT: retq
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entry:
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ret i32* @i
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}
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define i32 @f3() {
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; X86-LABEL: f3:
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; X86: # BB#0: # %entry
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; X86-NEXT: calll .L2$pb
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: .L2$pb:
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; X86-NEXT: popl %eax
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; X86-NEXT: .cfi_adjust_cfa_offset -4
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; X86-NEXT: .Ltmp0:
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; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L2$pb), %eax
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; X86-NEXT: movl i2@GOTNTPOFF(%eax), %eax
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; X86-NEXT: movl %gs:(%eax), %eax
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; X86-NEXT: retl
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;
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; X32-LABEL: f3:
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; X32: # BB#0: # %entry
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; X32-NEXT: movl i2@{{.*}}(%rip), %eax
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; X32-NEXT: movl %fs:(%eax), %eax
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; X32-NEXT: retq
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;
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; X64-LABEL: f3:
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; X64: # BB#0: # %entry
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; X64-NEXT: movq i2@{{.*}}(%rip), %rax
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; X64-NEXT: movl %fs:(%rax), %eax
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; X64-NEXT: retq
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entry:
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%tmp1 = load i32, i32* @i2
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ret i32 %tmp1
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}
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define i32* @f4() {
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; X86-LABEL: f4:
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; X86: # BB#0: # %entry
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; X86-NEXT: calll .L3$pb
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; X86-NEXT: .cfi_adjust_cfa_offset 4
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; X86-NEXT: .L3$pb:
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; X86-NEXT: popl %ecx
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; X86-NEXT: .cfi_adjust_cfa_offset -4
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; X86-NEXT: .Ltmp1:
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; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp1-.L3$pb), %ecx
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; X86-NEXT: movl %gs:0, %eax
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; X86-NEXT: addl i2@GOTNTPOFF(%ecx), %eax
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; X86-NEXT: retl
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;
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; X32-LABEL: f4:
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; X32: # BB#0: # %entry
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; X32-NEXT: movl %fs:0, %eax
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; X32-NEXT: addl i2@{{.*}}(%rip), %eax
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; X32-NEXT: retq
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;
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; X64-LABEL: f4:
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; X64: # BB#0: # %entry
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; X64-NEXT: movq %fs:0, %rax
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; X64-NEXT: addq i2@{{.*}}(%rip), %rax
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; X64-NEXT: retq
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entry:
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ret i32* @i2
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}
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!llvm.module.flags = !{!0, !1}
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!0 = !{i32 1, !"PIC Level", i32 1}
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!1 = !{i32 1, !"PIE Level", i32 1}
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