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7b4fe83ba8
llvm-mirror/lib/Target/PowerPC
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Nate Begeman 7b4fe83ba8 Implement floating point select for lt, gt, le, ge using the powerpc fsel 
instruction.

Now, rather than emitting the following loop out of bisect:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f4
	bge .LBB_main_64	; no_exit.0.i
.LBB_main_63:	; no_exit.0.i
	b .LBB_main_65	; no_exit.0.i
.LBB_main_64:	; no_exit.0.i
	fmr f2, f1
.LBB_main_65:	; no_exit.0.i
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f5
	bge .LBB_main_67	; no_exit.0.i
.LBB_main_66:	; no_exit.0.i
	b .LBB_main_68	; no_exit.0.i
.LBB_main_67:	; no_exit.0.i
	fmr f4, f1
.LBB_main_68:	; no_exit.0.i
	fadd f1, f2, f4
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fcmpu cr0, f4, f0
	bgt .LBB_main_70	; no_exit.0.i
.LBB_main_69:	; no_exit.0.i
	b .LBB_main_71	; no_exit.0.i
.LBB_main_70:	; no_exit.0.i
	fmr f0, f4
.LBB_main_71:	; no_exit.0.i
	fsub f1, f2, f1
	addi r2, r2, -1
	fcmpu cr0, f1, f3
	blt .LBB_main_73	; no_exit.0.i
.LBB_main_72:	; no_exit.0.i
	b .LBB_main_74	; no_exit.0.i
.LBB_main_73:	; no_exit.0.i
	fmr f3, f1
.LBB_main_74:	; no_exit.0.i
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

We emit this instead:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	fsel f1, f1, f1, f2
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f2, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f2
	fsel f2, f2, f2, f4
	fadd f1, f1, f2
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fsub f5, f0, f4
	fsel f0, f5, f0, f4
	fsub f1, f2, f1
	addi r2, r2, -1
	fsub f2, f1, f3
	fsel f3, f2, f3, f1
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

llvm-svn: 16764
2004-10-06 09:53:04 +00:00
..
LICENSE.TXT Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I 2004-08-05 23:46:27 +00:00
Makefile * Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between 2004-09-05 02:42:44 +00:00
PowerPC.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PowerPC.td * Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between 2004-09-05 02:42:44 +00:00
PowerPCAsmPrinter.cpp add optimized code sequences for setcc x, 0 2004-09-22 04:40:25 +00:00
PowerPCBranchSelector.cpp Convert remaining X-Form and Pseudo instructions over to asm writer 2004-09-02 08:13:00 +00:00
PowerPCFrameInfo.h LR needs to be saved at 16-byte offset on a 64-bit arch 2004-08-19 21:36:14 +00:00
PowerPCInstrBuilder.h * Wrap long lines (comments and code) 2004-07-07 20:01:36 +00:00
PowerPCInstrFormats.td All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PowerPCInstrInfo.h The PowerPCInstrInfo class has gone away. 2004-08-17 05:00:46 +00:00
PowerPCInstrInfo.td add optimized code sequences for setcc x, 0 2004-09-22 04:40:25 +00:00
PowerPCJITInfo.h Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 2004-08-11 00:11:25 +00:00
PowerPCRegisterInfo.h PowerPCRegisterInfo no longer takes a bool to differentiate 32 vs 64 bits 2004-08-17 05:02:18 +00:00
PowerPCRegisterInfo.td Revamp the Register class, and allow the use of the RegisterGroup class to 2004-09-14 04:17:02 +00:00
PowerPCTargetMachine.cpp All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PowerPCTargetMachine.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PPC32.td PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* 2004-08-17 04:55:41 +00:00
PPC32CodeEmitter.cpp Changes For Bug 352 2004-09-01 22:55:40 +00:00
PPC32InstrInfo.cpp PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* 2004-08-17 04:55:41 +00:00
PPC32InstrInfo.h PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* 2004-08-17 04:55:41 +00:00
PPC32ISelSimple.cpp Implement floating point select for lt, gt, le, ge using the powerpc fsel 2004-10-06 09:53:04 +00:00
PPC32JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC32RegisterInfo.cpp Correct some BuildMI arguments for the upcoming simple scheduler 2004-09-27 05:08:17 +00:00
PPC32RegisterInfo.h PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* 2004-08-17 04:55:41 +00:00
PPC32RegisterInfo.td Switch from bytes to bits for alignment. 2004-08-21 20:14:40 +00:00
PPC32TargetMachine.h All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00
PPC64.td Use the appropriate 64-bit register description file. 2004-08-19 19:36:57 +00:00
PPC64CodeEmitter.cpp Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit. 2004-08-11 00:10:41 +00:00
PPC64InstrInfo.cpp PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64InstrInfo.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64ISelSimple.cpp s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the 2004-09-21 18:22:33 +00:00
PPC64JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC64RegisterInfo.cpp Correct some BuildMI arguments for the upcoming simple scheduler 2004-09-27 05:08:17 +00:00
PPC64RegisterInfo.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
PPC64RegisterInfo.td Switch from bytes to bits for alignment. 2004-08-21 20:14:40 +00:00
PPC64TargetMachine.h PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC 2004-08-17 04:57:37 +00:00
README.txt All PPC instructions are now auto-printed 2004-09-04 05:00:00 +00:00

README.txt 

TODO:
* implement not-R0 register GPR class
* fix rlwimi generation to be use-and-def
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation