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243 lines
7.4 KiB
C++
243 lines
7.4 KiB
C++
//===--- RDFDeadCode.cpp --------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// RDF-based generic dead code elimination.
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#include "RDFGraph.h"
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#include "RDFLiveness.h"
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#include "RDFDeadCode.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include <queue>
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using namespace llvm;
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using namespace rdf;
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// This drastically improves execution time in "collect" over using
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// SetVector as a work queue, and popping the first element from it.
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template<typename T> struct DeadCodeElimination::SetQueue {
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SetQueue() : Set(), Queue() {}
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bool empty() const {
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return Queue.empty();
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}
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T pop_front() {
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T V = Queue.front();
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Queue.pop();
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Set.erase(V);
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return V;
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}
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void push_back(T V) {
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if (Set.count(V))
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return;
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Queue.push(V);
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Set.insert(V);
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}
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private:
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DenseSet<T> Set;
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std::queue<T> Queue;
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};
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// Check if the given instruction has observable side-effects, i.e. if
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// it should be considered "live". It is safe for this function to be
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// overly conservative (i.e. return "true" for all instructions), but it
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// is not safe to return "false" for an instruction that should not be
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// considered removable.
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bool DeadCodeElimination::isLiveInstr(const MachineInstr *MI) const {
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if (MI->mayStore() || MI->isBranch() || MI->isCall() || MI->isReturn())
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return true;
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if (MI->hasOrderedMemoryRef() || MI->hasUnmodeledSideEffects())
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return true;
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if (MI->isPHI())
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return false;
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for (auto &Op : MI->operands()) {
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if (Op.isReg() && MRI.isReserved(Op.getReg()))
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return true;
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if (Op.isRegMask()) {
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const uint32_t *BM = Op.getRegMask();
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for (unsigned R = 0, RN = DFG.getTRI().getNumRegs(); R != RN; ++R) {
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if (BM[R/32] & (1u << (R%32)))
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continue;
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if (MRI.isReserved(R))
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return true;
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}
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}
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}
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return false;
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}
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void DeadCodeElimination::scanInstr(NodeAddr<InstrNode*> IA,
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SetQueue<NodeId> &WorkQ) {
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if (!DFG.IsCode<NodeAttrs::Stmt>(IA))
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return;
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if (!isLiveInstr(NodeAddr<StmtNode*>(IA).Addr->getCode()))
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return;
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for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) {
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if (!LiveNodes.count(RA.Id))
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WorkQ.push_back(RA.Id);
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}
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}
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void DeadCodeElimination::processDef(NodeAddr<DefNode*> DA,
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SetQueue<NodeId> &WorkQ) {
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NodeAddr<InstrNode*> IA = DA.Addr->getOwner(DFG);
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for (NodeAddr<UseNode*> UA : IA.Addr->members_if(DFG.IsUse, DFG)) {
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if (!LiveNodes.count(UA.Id))
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WorkQ.push_back(UA.Id);
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}
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for (NodeAddr<DefNode*> TA : DFG.getRelatedRefs(IA, DA))
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LiveNodes.insert(TA.Id);
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}
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void DeadCodeElimination::processUse(NodeAddr<UseNode*> UA,
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SetQueue<NodeId> &WorkQ) {
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for (NodeAddr<DefNode*> DA : LV.getAllReachingDefs(UA)) {
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if (!LiveNodes.count(DA.Id))
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WorkQ.push_back(DA.Id);
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}
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}
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// Traverse the DFG and collect the set dead RefNodes and the set of
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// dead instructions. Return "true" if any of these sets is non-empty,
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// "false" otherwise.
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bool DeadCodeElimination::collect() {
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// This function works by first finding all live nodes. The dead nodes
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// are then the complement of the set of live nodes.
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//
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// Assume that all nodes are dead. Identify instructions which must be
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// considered live, i.e. instructions with observable side-effects, such
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// as calls and stores. All arguments of such instructions are considered
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// live. For each live def, all operands used in the corresponding
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// instruction are considered live. For each live use, all its reaching
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// defs are considered live.
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LiveNodes.clear();
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SetQueue<NodeId> WorkQ;
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for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG))
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for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG))
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scanInstr(IA, WorkQ);
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while (!WorkQ.empty()) {
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NodeId N = WorkQ.pop_front();
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LiveNodes.insert(N);
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auto RA = DFG.addr<RefNode*>(N);
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if (DFG.IsDef(RA))
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processDef(RA, WorkQ);
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else
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processUse(RA, WorkQ);
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}
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if (trace()) {
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dbgs() << "Live nodes:\n";
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for (NodeId N : LiveNodes) {
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auto RA = DFG.addr<RefNode*>(N);
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dbgs() << PrintNode<RefNode*>(RA, DFG) << "\n";
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}
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}
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auto IsDead = [this] (NodeAddr<InstrNode*> IA) -> bool {
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for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG))
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if (LiveNodes.count(DA.Id))
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return false;
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return true;
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};
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for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) {
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for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
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for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG))
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if (!LiveNodes.count(RA.Id))
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DeadNodes.insert(RA.Id);
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if (DFG.IsCode<NodeAttrs::Stmt>(IA))
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if (isLiveInstr(NodeAddr<StmtNode*>(IA).Addr->getCode()))
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continue;
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if (IsDead(IA)) {
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DeadInstrs.insert(IA.Id);
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if (trace())
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dbgs() << "Dead instr: " << PrintNode<InstrNode*>(IA, DFG) << "\n";
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}
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}
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}
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return !DeadNodes.empty();
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}
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// Erase the nodes given in the Nodes set from DFG. In addition to removing
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// them from the DFG, if a node corresponds to a statement, the corresponding
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// machine instruction is erased from the function.
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bool DeadCodeElimination::erase(const SetVector<NodeId> &Nodes) {
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if (Nodes.empty())
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return false;
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// Prepare the actual set of ref nodes to remove: ref nodes from Nodes
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// are included directly, for each InstrNode in Nodes, include the set
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// of all RefNodes from it.
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NodeList DRNs, DINs;
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for (auto I : Nodes) {
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auto BA = DFG.addr<NodeBase*>(I);
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uint16_t Type = BA.Addr->getType();
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if (Type == NodeAttrs::Ref) {
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DRNs.push_back(DFG.addr<RefNode*>(I));
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continue;
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}
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// If it's a code node, add all ref nodes from it.
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uint16_t Kind = BA.Addr->getKind();
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if (Kind == NodeAttrs::Stmt || Kind == NodeAttrs::Phi) {
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for (auto N : NodeAddr<CodeNode*>(BA).Addr->members(DFG))
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DRNs.push_back(N);
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DINs.push_back(DFG.addr<InstrNode*>(I));
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} else {
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llvm_unreachable("Unexpected code node");
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return false;
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}
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}
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// Sort the list so that use nodes are removed first. This makes the
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// "unlink" functions a bit faster.
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auto UsesFirst = [] (NodeAddr<RefNode*> A, NodeAddr<RefNode*> B) -> bool {
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uint16_t KindA = A.Addr->getKind(), KindB = B.Addr->getKind();
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if (KindA == NodeAttrs::Use && KindB == NodeAttrs::Def)
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return true;
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if (KindA == NodeAttrs::Def && KindB == NodeAttrs::Use)
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return false;
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return A.Id < B.Id;
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};
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std::sort(DRNs.begin(), DRNs.end(), UsesFirst);
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if (trace())
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dbgs() << "Removing dead ref nodes:\n";
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for (NodeAddr<RefNode*> RA : DRNs) {
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if (trace())
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dbgs() << " " << PrintNode<RefNode*>(RA, DFG) << '\n';
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if (DFG.IsUse(RA))
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DFG.unlinkUse(RA, true);
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else if (DFG.IsDef(RA))
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DFG.unlinkDef(RA, true);
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}
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// Now, remove all dead instruction nodes.
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for (NodeAddr<InstrNode*> IA : DINs) {
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NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG);
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BA.Addr->removeMember(IA, DFG);
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if (!DFG.IsCode<NodeAttrs::Stmt>(IA))
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continue;
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MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
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if (trace())
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dbgs() << "erasing: " << *MI;
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MI->eraseFromParent();
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}
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return true;
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}
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