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llvm-mirror/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
Bob Wilson d66a3fd73b Revise ARM inline assembly memory operands to require the memory address to
be in a register.  The previous use of ARM address mode 2 was completely
arbitrary and inappropriate for Thumb.  Radar 7137468.

llvm-svn: 84022
2009-10-13 20:50:28 +00:00

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LLVM

; RUN: llc < %s -march=arm | FileCheck %s
; RUN: llc < %s -march=thumb | FileCheck %s
; PR4091
define void @foo(i32 %i, i32* %p) nounwind {
;CHECK: swp r2, r0, [r1]
%asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind
ret void
}