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https://github.com/RPCS3/llvm-mirror.git
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1867a0f5e4
Summary: Fixed an issue for mips with an instruction such as 'sdc1 $f1, 272 +8(a0)' which has a space between '272' and '+'. The parser would then parse '272' and '+8' as two arguments instead of a single expression resulting in one too many arguments in the pseudo instruction. The reason that the test case has been changed is so that the expected output matches the output of the GNU assembler. Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13592 llvm-svn: 260521
41 lines
1.8 KiB
ArmAsm
41 lines
1.8 KiB
ArmAsm
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
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# RUN: FileCheck %s
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
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# RUN: FileCheck %s
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# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
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# RUN: FileCheck %s
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# Check that the IAS expands macro instructions in the same way as GAS
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.extern sym
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# imm and rs are deliberately swapped to test whitespace separated arguments.
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.macro EX2 insn, rd, imm, rs
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.ex\@: \insn \rd, \rs, \imm
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.endm
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.option pic0
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EX2 addiu $2, 1 $3 # CHECK: addiu $2, $3, 1
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EX2 addiu $2, ~1 $3 # CHECK: addiu $2, $3, -2
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EX2 addiu $2, ~ 1 $3 # CHECK: addiu $2, $3, -2
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EX2 addiu $2, 1+1 $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1+ 1 $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1 +1 $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1 + 1 $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1+~1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1+~ 1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1+ ~1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1 +~1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1 +~ 1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1 + ~1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1 + ~ 1 $3 # CHECK: addiu $2, $3, -1
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EX2 addiu $2, 1+(1) $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1 +(1) $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1+ (1) $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1 + (1) $3 # CHECK: addiu $2, $3, 2
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EX2 addiu $2, 1+(1)+1 $3 # CHECK: addiu $2, $3, 3
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EX2 addiu $2, 1 +(1)+1 $3 # CHECK: addiu $2, $3, 3
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EX2 addiu $2, 1+ (1)+1 $3 # CHECK: addiu $2, $3, 3
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EX2 addiu $2, 1 + (1)+1 $3 # CHECK: addiu $2, $3, 3
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nop # CHECK: nop
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