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277138a332
This is causing compilation timeouts on code with long sequences of local values and calls (i.e. foo(1); foo(2); foo(3); ...). It turns out that code coverage instrumentation is a great way to create sequences like this, which how our users ran into the issue in practice. Intel has a tool that detects these kinds of non-linear compile time issues, and Andy Kaylor reported it as PR37010. The current sinking code scans the whole basic block once per local value sink, which happens before emitting each call. In theory, local values should only be introduced to be used by instructions between the current flush point and the last flush point, so we should only need to scan those instructions. llvm-svn: 329822
300 lines
11 KiB
LLVM
300 lines
11 KiB
LLVM
; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM --check-prefix=ARM-MACHO
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM --check-prefix=ARM-ELF
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=+long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MACHO
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=+long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-ELF
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=+long-calls -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-LONG
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; Note that some of these tests assume that relocations are either
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; movw/movt or constant pool loads. Different platforms will select
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; different approaches.
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@message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
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@temp = common global [60 x i8] zeroinitializer, align 1
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define void @t1() nounwind ssp {
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; ARM-LABEL: t1:
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; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
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; ARM-DAG: add r0, r0, #5
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; ARM-DAG: movw r1, #64
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; ARM-DAG: movw r2, #10
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; ARM-DAG: and r1, r1, #255
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; ARM: bl {{_?}}memset
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; ARM-LONG-LABEL: t1:
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; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memset\$non_lazy_ptr)?}}
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; ARM-LONG-MACHO: ldr r3, [r3]
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; ARM-LONG-ELF: movw r3, :lower16:memset
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; ARM-LONG-ELF: movt r3, :upper16:memset
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; ARM-LONG: blx r3
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; THUMB-LABEL: t1:
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; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
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; THUMB: adds r0, #5
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; THUMB: movs r1, #64
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; THUMB: and r1, r1, #255
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; THUMB: movs r2, #10
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; THUMB: bl {{_?}}memset
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; THUMB-LONG-LABEL: t1:
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; THUMB-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memset.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
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define void @t2() nounwind ssp {
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; ARM-LABEL: t2:
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; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM-MACHO: ldr r0, [r0]
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; ARM-ELF: movw r0, :lower16:temp
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; ARM-ELF: movt r0, :upper16:temp
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; ARM: mov r0, r1
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; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; ARM: movw r2, #17
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; ARM: bl {{_?}}memcpy
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; ARM-LONG-LABEL: t2:
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; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memcpy\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memcpy\$non_lazy_ptr)?}}
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; ARM-LONG-MACHO: ldr r3, [r3]
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; ARM-LONG-ELF: movw r3, :lower16:memcpy
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; ARM-LONG-ELF: movt r3, :upper16:memcpy
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; ARM-LONG: blx r3
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; THUMB-LABEL: t2:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; THUMB: mov r0, r1
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; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; THUMB: movs r2, #17
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; THUMB: bl {{_?}}memcpy
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; THUMB-LONG-LABEL: t2:
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; THUMB-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 17, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
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define void @t3() nounwind ssp {
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; ARM-LABEL: t3:
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; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM-MACHO: ldr r0, [r0]
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; ARM-ELF: movw r0, :lower16:temp
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; ARM-ELF: movt r0, :upper16:temp
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: mov r0, r1
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; ARM: movw r2, #10
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; ARM: bl {{_?}}memmove
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; ARM-LONG-LABEL: t3:
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; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memmove\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memmove\$non_lazy_ptr)?}}
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; ARM-LONG-MACHO: ldr r3, [r3]
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; ARM-LONG-ELF: movw r3, :lower16:memmove
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; ARM-LONG-ELF: movt r3, :upper16:memmove
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; ARM-LONG: blx r3
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; THUMB-LABEL: t3:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; THUMB: mov r0, r1
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; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; THUMB: movs r2, #10
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; THUMB: bl {{_?}}memmove
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; THUMB-LONG-LABEL: t3:
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; THUMB-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memmove.p0i8.p0i8.i32(i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
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ret void
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}
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define void @t4() nounwind ssp {
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; ARM-LABEL: t4:
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; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM-MACHO: ldr r0, [r0]
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; ARM-ELF: movw r0, :lower16:temp
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; ARM-ELF: movt r0, :upper16:temp
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; ARM: ldr r1, [r0, #16]
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; ARM: str r1, [r0, #4]
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; ARM: ldr r1, [r0, #20]
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; ARM: str r1, [r0, #8]
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; ARM: ldrh r1, [r0, #24]
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; ARM: strh r1, [r0, #12]
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; ARM: bx lr
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; THUMB-LABEL: t4:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldr r1, [r0, #16]
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; THUMB: str r1, [r0, #4]
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; THUMB: ldr r1, [r0, #20]
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; THUMB: str r1, [r0, #8]
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; THUMB: ldrh r1, [r0, #24]
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; THUMB: strh r1, [r0, #12]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 4 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
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define void @t5() nounwind ssp {
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; ARM-LABEL: t5:
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; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM-MACHO: ldr r0, [r0]
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; ARM-ELF: movw r0, :lower16:temp
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; ARM-ELF: movt r0, :upper16:temp
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; ARM: ldrh r1, [r0, #16]
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; ARM: strh r1, [r0, #4]
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; ARM: ldrh r1, [r0, #18]
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; ARM: strh r1, [r0, #6]
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; ARM: ldrh r1, [r0, #20]
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; ARM: strh r1, [r0, #8]
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; ARM: ldrh r1, [r0, #22]
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; ARM: strh r1, [r0, #10]
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; ARM: ldrh r1, [r0, #24]
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; ARM: strh r1, [r0, #12]
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; ARM: bx lr
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; THUMB-LABEL: t5:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldrh r1, [r0, #16]
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; THUMB: strh r1, [r0, #4]
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; THUMB: ldrh r1, [r0, #18]
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; THUMB: strh r1, [r0, #6]
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; THUMB: ldrh r1, [r0, #20]
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; THUMB: strh r1, [r0, #8]
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; THUMB: ldrh r1, [r0, #22]
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; THUMB: strh r1, [r0, #10]
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; THUMB: ldrh r1, [r0, #24]
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; THUMB: strh r1, [r0, #12]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
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ret void
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}
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define void @t6() nounwind ssp {
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; ARM-LABEL: t6:
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; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM-MACHO: ldr r0, [r0]
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; ARM-ELF: movw r0, :lower16:temp
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; ARM-ELF: movt r0, :upper16:temp
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; ARM: ldrb r1, [r0, #16]
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; ARM: strb r1, [r0, #4]
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; ARM: ldrb r1, [r0, #17]
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; ARM: strb r1, [r0, #5]
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; ARM: ldrb r1, [r0, #18]
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; ARM: strb r1, [r0, #6]
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; ARM: ldrb r1, [r0, #19]
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; ARM: strb r1, [r0, #7]
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; ARM: ldrb r1, [r0, #20]
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; ARM: strb r1, [r0, #8]
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; ARM: ldrb r1, [r0, #21]
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; ARM: strb r1, [r0, #9]
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; ARM: ldrb r1, [r0, #22]
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; ARM: strb r1, [r0, #10]
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; ARM: ldrb r1, [r0, #23]
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; ARM: strb r1, [r0, #11]
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; ARM: ldrb r1, [r0, #24]
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; ARM: strb r1, [r0, #12]
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; ARM: ldrb r1, [r0, #25]
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; ARM: strb r1, [r0, #13]
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; ARM: bx lr
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; THUMB-LABEL: t6:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldrb r1, [r0, #16]
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; THUMB: strb r1, [r0, #4]
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; THUMB: ldrb r1, [r0, #17]
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; THUMB: strb r1, [r0, #5]
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; THUMB: ldrb r1, [r0, #18]
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; THUMB: strb r1, [r0, #6]
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; THUMB: ldrb r1, [r0, #19]
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; THUMB: strb r1, [r0, #7]
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; THUMB: ldrb r1, [r0, #20]
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; THUMB: strb r1, [r0, #8]
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; THUMB: ldrb r1, [r0, #21]
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; THUMB: strb r1, [r0, #9]
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; THUMB: ldrb r1, [r0, #22]
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; THUMB: strb r1, [r0, #10]
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; THUMB: ldrb r1, [r0, #23]
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; THUMB: strb r1, [r0, #11]
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; THUMB: ldrb r1, [r0, #24]
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; THUMB: strb r1, [r0, #12]
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; THUMB: ldrb r1, [r0, #25]
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; THUMB: strb r1, [r0, #13]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 1 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i1 false)
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ret void
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}
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; rdar://13202135
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define void @t7() nounwind ssp {
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; Just make sure this doesn't assert when we have an odd length and an alignment of 2.
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* align 2 getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 3, i1 false)
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ret void
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}
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define i32 @t8(i32 %x) nounwind {
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entry:
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; ARM-LABEL: t8:
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; ARM-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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; THUMB-LABEL: t8:
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; THUMB-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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%expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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ret i32 %expval
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}
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declare i32 @llvm.expect.i32(i32, i32) nounwind readnone
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