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fac519c9d7
This optimisation isn't generally profitable for ARM, because we can save/restore many registers in the prologue and epilogue using the PUSH and POP instructions, but mostly use individual LDR/STR instructions for other spills. Differential revision: https://reviews.llvm.org/D64910 llvm-svn: 367670
23 lines
631 B
LLVM
23 lines
631 B
LLVM
; RUN: llc -mtriple armv7a--none-eabi < %s | FileCheck %s
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; RUN: llc -mtriple armv7a--none-eabi < %s -enable-ipra | FileCheck %s
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; Other targets disable callee-saved registers for internal functions when
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; using IPRA, but that isn't profitable for ARM because the PUSH/POP
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; instructions can more efficiently save registers than using individual
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; LDR/STRs in the caller.
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define internal void @callee() norecurse {
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; CHECK-LABEL: callee:
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entry:
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; CHECK: push {r4, lr}
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; CHECK: pop {r4, pc}
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tail call void asm sideeffect "", "~{r4}"()
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ret void
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}
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define void @caller() {
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entry:
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call void @callee()
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ret void
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}
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