mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 21:13:02 +02:00
7bff890217
veqv (vector equivalence) vnand vorc I increased the AddedComplexity for these instructions to 500 to ensure they are generated instead of issuing other VSX instructions. Phabricator review: http://reviews.llvm.org/D7469 llvm-svn: 228580 |
||
---|---|---|
.. | ||
AArch64 | ||
ARM | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
R600 | ||
Sparc | ||
SystemZ | ||
X86 |