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https://github.com/RPCS3/llvm-mirror.git
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fb3abba237
Currently each Function points to a DISubprogram and DISubprogram has a scope field. For member functions the scope is a DICompositeType. DIScopes point to the DICompileUnit to facilitate type uniquing. Distinct DISubprograms (with isDefinition: true) are not part of the type hierarchy and cannot be uniqued. This change removes the subprograms list from DICompileUnit and instead adds a pointer to the owning compile unit to distinct DISubprograms. This would make it easy for ThinLTO to strip unneeded DISubprograms and their transitively referenced debug info. Motivation ---------- Materializing DISubprograms is currently the most expensive operation when doing a ThinLTO build of clang. We want the DISubprogram to be stored in a separate Bitcode block (or the same block as the function body) so we can avoid having to expensively deserialize all DISubprograms together with the global metadata. If a function has been inlined into another subprogram we need to store a reference the block containing the inlined subprogram. Attached to https://llvm.org/bugs/show_bug.cgi?id=27284 is a python script that updates LLVM IR testcases to the new format. http://reviews.llvm.org/D19034 <rdar://problem/25256815> llvm-svn: 266446
316 lines
12 KiB
LLVM
316 lines
12 KiB
LLVM
; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=x86_64-windows-msvc < %s -filetype=obj | llvm-readobj -codeview - | FileCheck %s --check-prefix=OBJ
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; This LL file was generated by running 'clang -g -gcodeview' on the
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; following code:
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; 1: extern "C" volatile int x;
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; 2: extern "C" void capture(int *p);
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; 3: static __forceinline inline void will_be_inlined() {
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; 4: int v = 3;
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; 5: capture(&v);
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; 6: }
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; 7: extern "C" void f(int param) {
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; 8: if (param) {
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; 9: int a = 42;
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; 10: will_be_inlined();
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; 11: capture(&a);
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; 12: } else {
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; 13: int b = 42;
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; 14: will_be_inlined();
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; 15: capture(&b);
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; 16: }
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; 17: }
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; ASM: f: # @f
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; ASM: .cv_file 1 "D:\\src\\llvm\\build\\t.cpp"
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; ASM: .cv_loc 0 1 7 0 is_stmt 0 # t.cpp:7:0
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; ASM: .seh_proc f
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; ASM: # BB#0: # %entry
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; ASM: subq $56, %rsp
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; ASM: #DEBUG_VALUE: f:param <- [%RSP+44]
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; ASM: movl %ecx, 44(%rsp)
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; ASM: [[prologue_end:\.Ltmp.*]]:
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; ASM: .cv_loc 0 1 8 7 # t.cpp:8:7
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; ASM: testl %ecx, %ecx
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; ASM: je .LBB0_2
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; ASM: [[if_start:\.Ltmp.*]]:
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; ASM: # BB#1: # %if.then
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; ASM: #DEBUG_VALUE: f:param <- [%RSP+44]
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; ASM: #DEBUG_VALUE: a <- [%RSP+40]
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; ASM: .cv_loc 0 1 9 9 # t.cpp:9:9
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; ASM: movl $42, 40(%rsp)
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; ASM: [[inline_site1:\.Ltmp.*]]:
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; ASM: .cv_loc 1 1 4 7 # t.cpp:4:7
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; ASM: movl $3, 48(%rsp)
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; ASM: leaq 48(%rsp), %rcx
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; ASM: .cv_loc 1 1 5 3 # t.cpp:5:3
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; ASM: callq capture
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; ASM: leaq 40(%rsp), %rcx
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; ASM: jmp .LBB0_3
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; ASM: [[else_start:\.Ltmp.*]]:
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; ASM: .LBB0_2: # %if.else
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; ASM: #DEBUG_VALUE: f:param <- [%RSP+44]
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; ASM: #DEBUG_VALUE: b <- [%RSP+36]
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; ASM: .cv_loc 0 1 13 9 # t.cpp:13:9
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; ASM: movl $42, 36(%rsp)
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; ASM: [[inline_site2:\.Ltmp.*]]:
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; ASM: .cv_loc 2 1 4 7 # t.cpp:4:7
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; ASM: movl $3, 52(%rsp)
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; ASM: leaq 52(%rsp), %rcx
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; ASM: .cv_loc 2 1 5 3 # t.cpp:5:3
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; ASM: callq capture
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; ASM: leaq 36(%rsp), %rcx
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; ASM: [[inline_site2_end:\.Ltmp.*]]:
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; ASM: .LBB0_3: # %if.end
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; ASM: .cv_loc 0 1 15 5 # t.cpp:15:5
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; ASM: callq capture
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; ASM: [[else_end:\.Ltmp.*]]:
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; ASM: .cv_loc 0 1 17 1 # t.cpp:17:1
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; ASM: nop
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; ASM: addq $56, %rsp
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; ASM: retq
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; ASM: [[param_end:\.Ltmp.*]]:
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; ASM: .short 4414 # Record kind: S_LOCAL
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; ASM: .long 116 # TypeIndex
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; ASM: .short 1 # Flags
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; ASM: .asciz "param"
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; ASM: .cv_def_range [[prologue_end]] [[param_end]], "E\021O\001\000\000,\000\000\000"
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; ASM: .short 4414 # Record kind: S_LOCAL
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; ASM: .long 116 # TypeIndex
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; ASM: .short 0 # Flags
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; ASM: .asciz "a"
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; ASM: .cv_def_range [[if_start]] [[else_start]], "E\021O\001\000\000(\000\000\000"
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; ASM: .short 4414 # Record kind: S_LOCAL
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; ASM: .long 116 # TypeIndex
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; ASM: .short 0 # Flags
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; ASM: .asciz "b"
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; ASM: .cv_def_range [[else_start]] [[else_end]], "E\021O\001\000\000$\000\000\000"
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; ASM: .short 4429 # Record kind: S_INLINESITE
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; ASM: .short 4414 # Record kind: S_LOCAL
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; ASM: .long 116 # TypeIndex
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; ASM: .short 0 # Flags
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; ASM: .asciz "v"
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; ASM: .cv_def_range [[inline_site1]] [[else_start]], "E\021O\001\000\0000\000\000\000"
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; ASM: .short 4430 # Record kind: S_INLINESITE_END
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; ASM: .short 4429 # Record kind: S_INLINESITE
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; ASM: .short 4414 # Record kind: S_LOCAL
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; ASM: .long 116 # TypeIndex
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; ASM: .short 0 # Flags
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; ASM: .asciz "v"
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; ASM: .cv_def_range [[inline_site2]] [[inline_site2_end]], "E\021O\001\000\0004\000\000\000"
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; ASM: .short 4430 # Record kind: S_INLINESITE_END
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; OBJ: Subsection [
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; OBJ: SubSectionType: Symbols (0xF1)
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; OBJ: ProcStart {
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; OBJ: DisplayName: f
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; OBJ: LinkageName: f
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; OBJ: }
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; OBJ: Local {
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; OBJ: Type: int (0x74)
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; OBJ: Flags [ (0x1)
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; OBJ: IsParameter (0x1)
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; OBJ: ]
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; OBJ: VarName: param
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; OBJ: }
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; OBJ: DefRangeRegisterRel {
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; OBJ: BaseRegister: 335
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; OBJ: HasSpilledUDTMember: No
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; OBJ: OffsetInParent: 0
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; OBJ: BasePointerOffset: 44
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; OBJ: LocalVariableAddrRange {
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; OBJ: OffsetStart: .text+0x8
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; OBJ: ISectStart: 0x0
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; OBJ: Range: 0x4F
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; OBJ: }
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; OBJ: }
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; OBJ: Local {
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; OBJ: Type: int (0x74)
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; OBJ: Flags [ (0x0)
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; OBJ: ]
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; OBJ: VarName: a
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; OBJ: }
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; OBJ: DefRangeRegisterRel {
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; OBJ: BaseRegister: 335
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; OBJ: HasSpilledUDTMember: No
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; OBJ: OffsetInParent: 0
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; OBJ: BasePointerOffset: 40
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; OBJ: LocalVariableAddrRange {
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; OBJ: OffsetStart: .text+0xC
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; OBJ: ISectStart: 0x0
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; OBJ: Range: 0x21
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; OBJ: }
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; OBJ: }
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; OBJ: Local {
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; OBJ: Type: int (0x74)
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; OBJ: Flags [ (0x0)
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; OBJ: ]
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; OBJ: VarName: b
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; OBJ: }
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; OBJ: DefRangeRegisterRel {
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; OBJ: BaseRegister: 335
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; OBJ: HasSpilledUDTMember: No
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; OBJ: OffsetInParent: 0
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; OBJ: BasePointerOffset: 36
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; OBJ: LocalVariableAddrRange {
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; OBJ: OffsetStart: .text+0x2D
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; OBJ: ISectStart: 0x0
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; OBJ: Range: 0x24
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; OBJ: }
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; OBJ: }
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; OBJ: InlineSite {
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; OBJ: PtrParent: 0x0
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; OBJ: PtrEnd: 0x0
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; OBJ: Inlinee: will_be_inlined (0x1002)
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; OBJ: BinaryAnnotations [
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; OBJ: ChangeLineOffset: 1
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; OBJ: ChangeCodeOffset: 0x14
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; OBJ: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0xD, LineOffset: 1}
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; OBJ: ChangeCodeLength: 0xC
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; OBJ: ]
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; OBJ: }
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; OBJ: Local {
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; OBJ: Type: int (0x74)
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; OBJ: Flags [ (0x0)
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; OBJ: ]
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; OBJ: VarName: v
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; OBJ: }
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; OBJ: DefRangeRegisterRel {
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; OBJ: BaseRegister: 335
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; OBJ: HasSpilledUDTMember: No
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; OBJ: OffsetInParent: 0
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; OBJ: BasePointerOffset: 48
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; OBJ: LocalVariableAddrRange {
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; OBJ: OffsetStart: .text+0x14
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; OBJ: ISectStart: 0x0
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; OBJ: Range: 0x19
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; OBJ: }
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; OBJ: }
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; OBJ: InlineSiteEnd {
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; OBJ: }
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; OBJ: InlineSite {
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; OBJ: PtrParent: 0x0
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; OBJ: PtrEnd: 0x0
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; OBJ: Inlinee: will_be_inlined (0x1002)
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; OBJ: BinaryAnnotations [
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; OBJ: ChangeLineOffset: 1
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; OBJ: ChangeCodeOffset: 0x35
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; OBJ: ChangeCodeOffsetAndLineOffset: {CodeOffset: 0xD, LineOffset: 1}
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; OBJ: ChangeCodeLength: 0xA
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; OBJ: ]
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; OBJ: }
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; OBJ: Local {
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; OBJ: Type: int (0x74)
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; OBJ: Flags [ (0x0)
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; OBJ: ]
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; OBJ: VarName: v
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; OBJ: }
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; OBJ: DefRangeRegisterRel {
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; OBJ: BaseRegister: 335
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; OBJ: HasSpilledUDTMember: No
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; OBJ: OffsetInParent: 0
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; OBJ: BasePointerOffset: 52
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; OBJ: LocalVariableAddrRange {
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; OBJ: OffsetStart: .text+0x35
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; OBJ: ISectStart: 0x0
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; OBJ: Range: 0x17
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; OBJ: }
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; OBJ: }
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; OBJ: InlineSiteEnd {
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; OBJ: }
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; OBJ: ProcEnd
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; OBJ: ]
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; ModuleID = 't.cpp'
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target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-windows-msvc18.0.0"
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; Function Attrs: nounwind uwtable
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define void @f(i32 %param) #0 !dbg !4 {
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entry:
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%v.i1 = alloca i32, align 4
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call void @llvm.dbg.declare(metadata i32* %v.i1, metadata !15, metadata !16), !dbg !17
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%v.i = alloca i32, align 4
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call void @llvm.dbg.declare(metadata i32* %v.i, metadata !15, metadata !16), !dbg !21
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%param.addr = alloca i32, align 4
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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store i32 %param, i32* %param.addr, align 4
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call void @llvm.dbg.declare(metadata i32* %param.addr, metadata !24, metadata !16), !dbg !25
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%0 = load i32, i32* %param.addr, align 4, !dbg !26
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%tobool = icmp ne i32 %0, 0, !dbg !26
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br i1 %tobool, label %if.then, label %if.else, !dbg !27
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if.then: ; preds = %entry
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call void @llvm.dbg.declare(metadata i32* %a, metadata !28, metadata !16), !dbg !29
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store i32 42, i32* %a, align 4, !dbg !29
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store i32 3, i32* %v.i, align 4, !dbg !21
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call void @capture(i32* %v.i) #3, !dbg !30
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call void @capture(i32* %a), !dbg !31
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br label %if.end, !dbg !32
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if.else: ; preds = %entry
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call void @llvm.dbg.declare(metadata i32* %b, metadata !33, metadata !16), !dbg !34
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store i32 42, i32* %b, align 4, !dbg !34
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store i32 3, i32* %v.i1, align 4, !dbg !17
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call void @capture(i32* %v.i1) #3, !dbg !35
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call void @capture(i32* %b), !dbg !36
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret void, !dbg !37
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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declare void @capture(i32*) #2
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attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #3 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!11, !12, !13}
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!llvm.ident = !{!14}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.9.0 ", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "t.cpp", directory: "D:\5Csrc\5Cllvm\5Cbuild")
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!2 = !{}
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!4 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 7, type: !5, isLocal: false, isDefinition: true, scopeLine: 7, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
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!5 = !DISubroutineType(types: !6)
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!6 = !{null, !7}
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!7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
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!8 = distinct !DISubprogram(name: "will_be_inlined", linkageName: "\01?will_be_inlined@@YAXXZ", scope: !1, file: !1, line: 3, type: !9, isLocal: true, isDefinition: true, scopeLine: 3, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
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!9 = !DISubroutineType(types: !10)
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!10 = !{null}
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!11 = !{i32 2, !"CodeView", i32 1}
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!12 = !{i32 2, !"Debug Info Version", i32 3}
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!13 = !{i32 1, !"PIC Level", i32 2}
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!14 = !{!"clang version 3.9.0 "}
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!15 = !DILocalVariable(name: "v", scope: !8, file: !1, line: 4, type: !7)
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!16 = !DIExpression()
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!17 = !DILocation(line: 4, column: 7, scope: !8, inlinedAt: !18)
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!18 = distinct !DILocation(line: 14, column: 5, scope: !19)
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!19 = distinct !DILexicalBlock(scope: !20, file: !1, line: 12, column: 10)
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!20 = distinct !DILexicalBlock(scope: !4, file: !1, line: 8, column: 7)
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!21 = !DILocation(line: 4, column: 7, scope: !8, inlinedAt: !22)
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!22 = distinct !DILocation(line: 10, column: 5, scope: !23)
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!23 = distinct !DILexicalBlock(scope: !20, file: !1, line: 8, column: 14)
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!24 = !DILocalVariable(name: "param", arg: 1, scope: !4, file: !1, line: 7, type: !7)
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!25 = !DILocation(line: 7, column: 23, scope: !4)
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!26 = !DILocation(line: 8, column: 7, scope: !20)
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!27 = !DILocation(line: 8, column: 7, scope: !4)
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!28 = !DILocalVariable(name: "a", scope: !23, file: !1, line: 9, type: !7)
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!29 = !DILocation(line: 9, column: 9, scope: !23)
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!30 = !DILocation(line: 5, column: 3, scope: !8, inlinedAt: !22)
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!31 = !DILocation(line: 11, column: 5, scope: !23)
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!32 = !DILocation(line: 12, column: 3, scope: !23)
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!33 = !DILocalVariable(name: "b", scope: !19, file: !1, line: 13, type: !7)
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!34 = !DILocation(line: 13, column: 9, scope: !19)
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!35 = !DILocation(line: 5, column: 3, scope: !8, inlinedAt: !18)
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!36 = !DILocation(line: 15, column: 5, scope: !19)
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!37 = !DILocation(line: 17, column: 1, scope: !4)
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