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aa1d2d9fb2
Add the scheduling and cost model for Exynos M3. Differential revision: https://reviews.llvm.org/D42387 llvm-svn: 323773
101 lines
3.8 KiB
LLVM
101 lines
3.8 KiB
LLVM
; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECK0 < %t
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; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -max-jump-table-size=4 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECK4 < %t
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; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -max-jump-table-size=8 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECK8 < %t
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; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -mcpu=exynos-m1 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECKM1 < %t
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; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -mcpu=exynos-m3 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECKM3 < %t
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declare void @ext(i32)
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define i32 @jt1(i32 %a, i32 %b) {
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entry:
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switch i32 %a, label %return [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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i32 5, label %bb5
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i32 6, label %bb6
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i32 7, label %bb7
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i32 8, label %bb8
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i32 9, label %bb9
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i32 10, label %bb10
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i32 11, label %bb11
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i32 12, label %bb12
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i32 13, label %bb13
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i32 14, label %bb14
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i32 15, label %bb15
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i32 16, label %bb16
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i32 17, label %bb17
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]
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; CHECK-LABEL: function jt1:
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; CHECK-NEXT: Jump Tables:
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; CHECK0-NEXT: %jump-table.0:
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; CHECK0-NOT: %jump-table.1:
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; CHECK4-NEXT: %jump-table.0:
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; CHECK4-SAME: %jump-table.1:
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; CHECK4-SAME: %jump-table.2:
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; CHECK4-SAME: %jump-table.3:
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; CHECK4-NOT: %jump-table.4:
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; CHECK8-NEXT: %jump-table.0:
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; CHECK8-SAME: %jump-table.1:
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; CHECK8-NOT: %jump-table.2:
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; CHECKM1-NEXT: %jump-table.0:
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; CHECKM1-SAME: %jump-table.1
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; CHECKM1-NOT: %jump-table.2:
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; CHECKM3-NEXT: %jump-table.0:
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; CHECKM3-NOT: %jump-table.1:
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bb1: tail call void @ext(i32 0) br label %return
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bb2: tail call void @ext(i32 2) br label %return
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bb3: tail call void @ext(i32 4) br label %return
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bb4: tail call void @ext(i32 6) br label %return
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bb5: tail call void @ext(i32 8) br label %return
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bb6: tail call void @ext(i32 10) br label %return
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bb7: tail call void @ext(i32 12) br label %return
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bb8: tail call void @ext(i32 14) br label %return
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bb9: tail call void @ext(i32 16) br label %return
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bb10: tail call void @ext(i32 18) br label %return
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bb11: tail call void @ext(i32 20) br label %return
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bb12: tail call void @ext(i32 22) br label %return
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bb13: tail call void @ext(i32 24) br label %return
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bb14: tail call void @ext(i32 26) br label %return
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bb15: tail call void @ext(i32 28) br label %return
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bb16: tail call void @ext(i32 30) br label %return
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bb17: tail call void @ext(i32 32) br label %return
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return: ret i32 %b
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}
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define void @jt2(i32 %x) {
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entry:
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switch i32 %x, label %return [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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i32 14, label %bb5
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i32 15, label %bb6
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]
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; CHECK-LABEL: function jt2:
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; CHECK-NEXT: Jump Tables:
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; CHECK0-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.5 %bb.6{{$}}
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; CHECK0-NOT: %jump-table.1
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; CHECK4-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4{{$}}
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; CHECK4-NOT: %jump-table.1
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; CHECK8-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4{{$}}
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; CHECK8-NOT: %jump-table.1
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; CHECKM1-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4{{$}}
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; CHECKM1-NOT: %jump-table.1
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; CHECKM3-NEXT: %jump-table.0: %bb.1 %bb.2 %bb.3 %bb.4 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.7 %bb.5 %bb.6{{$}}
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; CHECKM3-NOT: %jump-table.1
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bb1: tail call void @ext(i32 1) br label %return
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bb2: tail call void @ext(i32 2) br label %return
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bb3: tail call void @ext(i32 3) br label %return
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bb4: tail call void @ext(i32 4) br label %return
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bb5: tail call void @ext(i32 5) br label %return
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bb6: tail call void @ext(i32 6) br label %return
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return: ret void
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}
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