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311 lines
6.8 KiB
YAML
311 lines
6.8 KiB
YAML
# RUN: llc -mtriple arm-- -global-isel -run-pass=regbankselect %s -o - | FileCheck %s
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--- |
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define void @test_add_s32() { ret void }
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define void @test_add_s16() { ret void }
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define void @test_add_s8() { ret void }
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define void @test_add_s1() { ret void }
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define void @test_loads() #0 { ret void }
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define void @test_stores() #0 { ret void }
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define void @test_gep() { ret void }
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define void @test_fadd_s32() #0 { ret void }
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define void @test_fadd_s64() #0 { ret void }
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define void @test_soft_fp_s64() #0 { ret void }
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attributes #0 = { "target-features"="+vfp2"}
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...
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---
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name: test_add_s32
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# CHECK-LABEL: name: test_add_s32
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s32) = G_ADD %0, %1
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%r0 = COPY %2(s32)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_add_s16
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# CHECK-LABEL: name: test_add_s16
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(s16) = COPY %r0
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%1(s16) = COPY %r1
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%2(s16) = G_ADD %0, %1
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%r0 = COPY %2(s16)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_add_s8
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# CHECK-LABEL: name: test_add_s8
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(s8) = COPY %r0
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%1(s8) = COPY %r1
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%2(s8) = G_ADD %0, %1
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%r0 = COPY %2(s8)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_add_s1
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# CHECK-LABEL: name: test_add_s1
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(s1) = COPY %r0
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%1(s1) = COPY %r1
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%2(s1) = G_ADD %0, %1
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%r0 = COPY %2(s1)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_loads
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# CHECK-LABEL: name: test_loads
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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# CHECK: - { id: 3, class: gprb }
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# CHECK: - { id: 4, class: gprb }
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# CHECK: - { id: 5, class: gprb }
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# CHECK: - { id: 6, class: fprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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body: |
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bb.0:
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liveins: %r0
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%0(p0) = COPY %r0
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%6(s64) = G_LOAD %0 :: (load 8)
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%1(s32) = G_LOAD %0 :: (load 4)
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%2(s16) = G_LOAD %0 :: (load 2)
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%3(s8) = G_LOAD %0 :: (load 1)
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%4(s1) = G_LOAD %0 :: (load 1)
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%5(p0) = G_LOAD %0 :: (load 4)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_stores
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# CHECK-LABEL: name: test_stores
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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# CHECK: - { id: 3, class: gprb }
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# CHECK: - { id: 4, class: gprb }
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# CHECK: - { id: 5, class: gprb }
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# CHECK: - { id: 6, class: fprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1, %r2, %r3, %r4, %r5, %d6
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%0(p0) = COPY %r0
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%1(s32) = COPY %r1
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G_STORE %1(s32), %0 :: (store 4)
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%2(s16) = COPY %r2
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G_STORE %2(s16), %0 :: (store 2)
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%3(s8) = COPY %r3
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G_STORE %3(s8), %0 :: (store 1)
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%4(s1) = COPY %r4
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G_STORE %4(s1), %0 :: (store 1)
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%5(p0) = COPY %r5
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G_STORE %5(p0), %0 :: (store 4)
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%6(s64) = COPY %d6
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G_STORE %6(s64), %0 :: (store 8)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_gep
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# CHECK-LABEL: name: test_gep
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(p0) = COPY %r0
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%1(s32) = COPY %r1
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%2(p0) = G_GEP %0, %1(s32)
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%r0 = COPY %2(p0)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_fadd_s32
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# CHECK-LABEL: name: test_fadd_s32
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: fprb }
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# CHECK: - { id: 1, class: fprb }
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# CHECK: - { id: 2, class: fprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %s0, %s1
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%0(s32) = COPY %s0
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%1(s32) = COPY %s1
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%2(s32) = G_FADD %0, %1
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%s0 = COPY %2(s32)
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BX_RET 14, _, implicit %s0
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...
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---
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name: test_fadd_s64
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# CHECK-LABEL: name: test_fadd_s64
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: fprb }
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# CHECK: - { id: 1, class: fprb }
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# CHECK: - { id: 2, class: fprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %d0, %d1
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%0(s64) = COPY %d0
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%1(s64) = COPY %d1
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%2(s64) = G_FADD %0, %1
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%d0 = COPY %2(s64)
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BX_RET 14, _, implicit %d0
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...
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---
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name: test_soft_fp_s64
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# CHECK-LABEL: name: test_soft_fp_s64
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legalized: true
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regBankSelected: false
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selected: false
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# CHECK: registers:
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# CHECK: - { id: 0, class: gprb }
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# CHECK: - { id: 1, class: gprb }
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# CHECK: - { id: 2, class: fprb }
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# CHECK: - { id: 3, class: gprb }
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# CHECK: - { id: 4, class: gprb }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s64) = G_SEQUENCE %0(s32), 0, %1(s32), 32
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%3(s32), %4(s32) = G_EXTRACT %2(s64), 0, 32
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%r0 = COPY %3(s32)
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%r1 = COPY %4(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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