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a5a77bb95c
r265506 breaks print-stack-trace.cc test case of compiler-rt in bootstrap test. http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/1708 llvm-svn: 265528
192 lines
5.7 KiB
LLVM
192 lines
5.7 KiB
LLVM
; RUN: llc < %s -O1 -disable-ppc-sco=false -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=CHECK-SCO
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; RUN: llc < %s -O1 -disable-ppc-sco=false -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-SCO-HASQPX
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; RUN: llc < %s -O1 -disable-ppc-sco=false -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-SCO-HASQPX
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; No combination of "powerpc64le-unknown-linux-gnu" + "CHECK-SCO", because
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; only Power8 (and later) fully support LE.
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%S_56 = type { [13 x i32], i32 }
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%S_64 = type { [15 x i32], i32 }
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%S_32 = type { [7 x i32], i32 }
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; Function Attrs: noinline nounwind
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define void @callee_56_copy([7 x i64] %a, %S_56* %b) #0 { ret void }
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define void @callee_64_copy([8 x i64] %a, %S_64* %b) #0 { ret void }
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; Function Attrs: nounwind
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define void @caller_56_reorder_copy(%S_56* %b, [7 x i64] %a) #1 {
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tail call void @callee_56_copy([7 x i64] %a, %S_56* %b)
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ret void
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; CHECK-SCO-LABEL: caller_56_reorder_copy:
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; CHECK-SCO-NOT: stdu 1
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; CHECK-SCO: TC_RETURNd8 callee_56_copy
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}
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define void @caller_64_reorder_copy(%S_64* %b, [8 x i64] %a) #1 {
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tail call void @callee_64_copy([8 x i64] %a, %S_64* %b)
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ret void
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; CHECK-SCO-LABEL: caller_64_reorder_copy:
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; CHECK-SCO: bl callee_64_copy
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}
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define void @callee_64_64_copy([8 x i64] %a, [8 x i64] %b) #0 { ret void }
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define void @caller_64_64_copy([8 x i64] %a, [8 x i64] %b) #1 {
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tail call void @callee_64_64_copy([8 x i64] %a, [8 x i64] %b)
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ret void
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; CHECK-SCO-LABEL: caller_64_64_copy:
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; CHECK-SCO: b callee_64_64_copy
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}
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define void @caller_64_64_reorder_copy([8 x i64] %a, [8 x i64] %b) #1 {
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tail call void @callee_64_64_copy([8 x i64] %b, [8 x i64] %a)
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ret void
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; CHECK-SCO-LABEL: caller_64_64_reorder_copy:
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; CHECK-SCO: bl callee_64_64_copy
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}
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define void @caller_64_64_undef_copy([8 x i64] %a, [8 x i64] %b) #1 {
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tail call void @callee_64_64_copy([8 x i64] %a, [8 x i64] undef)
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ret void
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; CHECK-SCO-LABEL: caller_64_64_undef_copy:
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; CHECK-SCO: b callee_64_64_copy
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}
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define void @arg8_callee(
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float %a, i32 signext %b, float %c, i32* %d,
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i8 zeroext %e, float %f, i32* %g, i32 signext %h)
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{
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ret void
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}
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define void @arg8_caller(float %a, i32 signext %b, i8 zeroext %c, i32* %d) {
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entry:
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tail call void @arg8_callee(float undef, i32 signext undef, float undef,
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i32* %d, i8 zeroext undef, float undef,
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i32* undef, i32 signext undef)
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ret void
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; CHECK-SCO-LABEL: arg8_caller:
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; CHECK-SCO: b arg8_callee
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}
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; Struct return test
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; Function Attrs: noinline nounwind
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define void @callee_sret_56(%S_56* noalias sret %agg.result) #0 { ret void }
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define void @callee_sret_32(%S_32* noalias sret %agg.result) #0 { ret void }
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; Function Attrs: nounwind
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define void @caller_do_something_sret_32(%S_32* noalias sret %agg.result) #1 {
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%1 = alloca %S_56, align 4
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%2 = bitcast %S_56* %1 to i8*
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call void @callee_sret_56(%S_56* nonnull sret %1)
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tail call void @callee_sret_32(%S_32* sret %agg.result)
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ret void
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; CHECK-SCO-LABEL: caller_do_something_sret_32:
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; CHECK-SCO: stdu 1
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; CHECK-SCO: bl callee_sret_56
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; CHECK-SCO: addi 1
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; CHECK-SCO: TC_RETURNd8 callee_sret_32
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}
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define void @caller_local_sret_32(%S_32* %a) #1 {
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%tmp = alloca %S_32, align 4
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tail call void @callee_sret_32(%S_32* nonnull sret %tmp)
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ret void
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; CHECK-SCO-LABEL: caller_local_sret_32:
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; CHECK-SCO: bl callee_sret_32
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}
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attributes #0 = { noinline nounwind }
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attributes #1 = { nounwind }
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; vector <4 x i1> test
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define void @callee_v4i1(i8 %a, <4 x i1> %b, <4 x i1> %c) { ret void }
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define void @caller_v4i1_reorder(i8 %a, <4 x i1> %b, <4 x i1> %c) {
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tail call void @callee_v4i1(i8 %a, <4 x i1> %c, <4 x i1> %b)
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ret void
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; <4 x i1> is 32 bytes aligned, if subtarget doesn't support qpx, then we can't
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; place b, c to qpx register, so we can't do sco on caller_v4i1_reorder
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; CHECK-SCO-LABEL: caller_v4i1_reorder:
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; CHECK-SCO: bl callee_v4i1
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; CHECK-SCO-HASQPX-LABEL: caller_v4i1_reorder:
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; CHECK-SCO-HASQPX: b callee_v4i1
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}
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define void @f128_callee(i32* %ptr, ppc_fp128 %a, ppc_fp128 %b) { ret void }
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define void @f128_caller(i32* %ptr, ppc_fp128 %a, ppc_fp128 %b) {
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tail call void @f128_callee(i32* %ptr, ppc_fp128 %a, ppc_fp128 %b)
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ret void
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; CHECK-SCO-LABEL: f128_caller:
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; CHECK-SCO: b f128_callee
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}
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; weak linkage test
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%class.T = type { [2 x i8] }
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define weak_odr hidden void @wo_hcallee(%class.T* %this, i8* %c) { ret void }
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define void @wo_hcaller(%class.T* %this, i8* %c) {
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tail call void @wo_hcallee(%class.T* %this, i8* %c)
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ret void
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; CHECK-SCO-LABEL: wo_hcaller:
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; CHECK-SCO: b wo_hcallee
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}
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define weak_odr protected void @wo_pcallee(%class.T* %this, i8* %c) { ret void }
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define void @wo_pcaller(%class.T* %this, i8* %c) {
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tail call void @wo_pcallee(%class.T* %this, i8* %c)
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ret void
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; CHECK-SCO-LABEL: wo_pcaller:
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; CHECK-SCO: b wo_pcallee
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}
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define weak_odr void @wo_callee(%class.T* %this, i8* %c) { ret void }
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define void @wo_caller(%class.T* %this, i8* %c) {
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tail call void @wo_callee(%class.T* %this, i8* %c)
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ret void
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; CHECK-SCO-LABEL: wo_caller:
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; CHECK-SCO: bl wo_callee
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}
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define weak protected void @w_pcallee(i8* %ptr) { ret void }
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define void @w_pcaller(i8* %ptr) {
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tail call void @w_pcallee(i8* %ptr)
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ret void
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; CHECK-SCO-LABEL: w_pcaller:
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; CHECK-SCO: b w_pcallee
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}
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define weak hidden void @w_hcallee(i8* %ptr) { ret void }
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define void @w_hcaller(i8* %ptr) {
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tail call void @w_hcallee(i8* %ptr)
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ret void
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; CHECK-SCO-LABEL: w_hcaller:
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; CHECK-SCO: b w_hcallee
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}
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define weak void @w_callee(i8* %ptr) { ret void }
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define void @w_caller(i8* %ptr) {
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tail call void @w_callee(i8* %ptr)
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ret void
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; CHECK-SCO-LABEL: w_caller:
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; CHECK-SCO: bl w_callee
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}
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