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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/lib/Target/RISCV
2019-09-13 04:03:32 +00:00
..
AsmParser Do a sweep of symbol internalization. NFC. 2019-08-23 19:59:23 +00:00
Disassembler [RISCV] Remove fix introduced by r369573, superseded by r369580 2019-08-21 22:02:56 +00:00
MCTargetDesc [RISCV] Support llvm-objdump -M no-aliases and -M numeric 2019-09-10 16:24:03 +00:00
TargetInfo
Utils [RISCV] Avoid signed integer overflow UB in RISCVMatInt::generateInstSeq 2019-07-18 04:02:58 +00:00
CMakeLists.txt [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
LLVMBuild.txt [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCV.h [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCV.td [RISCV] Add support for RVC HINT instructions 2019-08-21 14:00:58 +00:00
RISCVAsmPrinter.cpp [RISCV] Support z and i operand modifiers 2019-07-08 05:00:26 +00:00
RISCVCallingConv.td
RISCVCallLowering.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVCallLowering.h [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVExpandPseudoInsts.cpp [RISCV] Convert registers from unsigned to Register 2019-08-16 14:27:50 +00:00
RISCVFrameLowering.cpp [RISCV] Support stack offset exceed 32-bit for RV64 2019-09-13 04:03:32 +00:00
RISCVFrameLowering.h [RISCV] Convert registers from unsigned to Register 2019-08-16 14:27:50 +00:00
RISCVInstrFormats.td
RISCVInstrFormatsC.td
RISCVInstrInfo.cpp [RISCV] Support stack offset exceed 32-bit for RV64 2019-09-13 04:03:32 +00:00
RISCVInstrInfo.h [RISCV] Support stack offset exceed 32-bit for RV64 2019-09-13 04:03:32 +00:00
RISCVInstrInfo.td [RISCV] Add support for RVC HINT instructions 2019-08-21 14:00:58 +00:00
RISCVInstrInfoA.td [RISCV] Add Custom Parser for Atomic Memory Operands 2019-08-01 12:42:31 +00:00
RISCVInstrInfoC.td [RISCV] Add support for RVC HINT instructions 2019-08-21 14:00:58 +00:00
RISCVInstrInfoD.td
RISCVInstrInfoF.td [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references 2019-07-05 12:16:40 +00:00
RISCVInstrInfoM.td
RISCVInstructionSelector.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVISelDAGToDAG.cpp [RISCV] Lower inline asm constraint A for RISC-V 2019-08-16 10:28:34 +00:00
RISCVISelLowering.cpp [Alignment][NFC] Use Align with TargetLowering::setPrefFunctionAlignment 2019-09-06 15:03:49 +00:00
RISCVISelLowering.h [RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall 2019-08-28 23:40:37 +00:00
RISCVLegalizerInfo.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVLegalizerInfo.h [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVMachineFunctionInfo.h
RISCVMCInstLower.cpp
RISCVMergeBaseOffset.cpp [RISCV] Convert registers from unsigned to Register 2019-08-16 14:27:50 +00:00
RISCVRegisterBankInfo.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVRegisterBankInfo.h [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVRegisterBanks.td [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVRegisterInfo.cpp [RISCV] Support stack offset exceed 32-bit for RV64 2019-09-13 04:03:32 +00:00
RISCVRegisterInfo.h [RISCV] Implement RISCVRegisterInfo::getPointerRegClass 2019-08-27 21:37:57 +00:00
RISCVRegisterInfo.td [RISCV] Add support for RVC HINT instructions 2019-08-21 14:00:58 +00:00
RISCVSubtarget.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVSubtarget.h [RISCV] Add support for RVC HINT instructions 2019-08-21 14:00:58 +00:00
RISCVSystemOperands.td [RISCV][NFC] Replace hard-coded CSR duplication with symbolic references 2019-07-05 12:16:40 +00:00
RISCVTargetMachine.cpp [RISCV GlobalISel] Adding initial GlobalISel infrastructure 2019-08-20 22:53:24 +00:00
RISCVTargetMachine.h
RISCVTargetObjectFile.cpp
RISCVTargetObjectFile.h
RISCVTargetTransformInfo.cpp [RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates where getMinSignedBits() > 64 2019-07-09 10:56:18 +00:00
RISCVTargetTransformInfo.h