Fraser Cormack 7d1ce513fb [RISCV] Add patterns for scalable-vector fabs & fcopysign ... The patterns mostly follow the scalar counterparts, save for some extra optimizations to match the vector/scalar forms. The patch adds a DAGCombine for ISD::FCOPYSIGN to try and reorder ISD::FNEG around any ISD::FP_EXTEND or ISD::FP_TRUNC of the second operand. This helps us achieve better codegen to match vfsgnjn. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D96028		2021-02-16 10:21:09 +00:00
..
AArch64	GlobalISel: Handle arguments partially passed on the stack	2021-02-15 17:06:14 -05:00
AMDGPU	[AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn	2021-02-15 11:27:59 -08:00
ARC
ARM	[ARM] Extend search for increment in load/store optimizer	2021-02-15 13:17:21 +00:00
AVR	[AVR] Fix a bug in 16-bit shifts	2021-02-14 11:54:55 +08:00
BPF
Generic	[CodeGen] New pass: Replace vector intrinsics with call to vector library	2021-02-12 12:53:27 -05:00
Hexagon
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC	[test] Make ELF tests less reliant on the lexicographical order of non-local symbols	2021-02-13 01:01:06 -08:00
RISCV	[RISCV] Add patterns for scalable-vector fabs & fcopysign	2021-02-16 10:21:09 +00:00
SPARC
SystemZ
Thumb
Thumb2	[ARM] Extend search for increment in load/store optimizer	2021-02-15 13:17:21 +00:00
VE
WebAssembly	[WebAssemblly] Fix rethrow's argument computation	2021-02-13 03:43:15 -08:00
WinCFGuard
WinEH
X86	[X86] Add SSE2+SSE3 common check prefix to psubus tests	2021-02-15 14:07:11 +00:00
XCore