Roman Lebedev bedf13b1a7 [SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125) ... I can't seem to wrap my head around the proper fix here, we should be fine without this requirement, iff we can form this form, but the naive attempt (https://reviews.llvm.org/D106317) has failed. So just to unblock the release, put up a restriction. Fixes https://bugs.llvm.org/show_bug.cgi?id=51125 (cherry picked from commit 909cba969981032c5740774ca84a34b7f76b909b)		2021-09-10 09:02:26 -07:00
..
AArch64	Workaround incorrect types when lowering fixed length gather/scatter	2021-09-09 09:05:58 -07:00
AMDGPU	AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9	2021-07-27 15:56:42 -04:00
ARC
ARM	[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert	2021-08-18 12:14:24 -07:00
AVR
BPF	BPF: avoid NE/EQ loop exit condition	2021-08-06 12:45:53 -07:00
Generic	[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX	2021-07-26 23:21:38 +00:00
Hexagon	[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs	2021-07-27 18:36:28 -05:00
Inputs
Lanai
M68k
Mips
MIR
MSP430
NVPTX
PowerPC	Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."	2021-09-08 20:46:17 -07:00
RISCV	[RISCV] Fix reporting of incorrect commutable operand indices	2021-09-03 15:48:26 -07:00
SPARC
SystemZ	[SystemZ][z/OS] Initial code to generate assembly files on z/OS	2021-07-27 11:29:15 -04:00
Thumb
Thumb2	[SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)	2021-09-10 09:02:26 -07:00
VE
WebAssembly	[WebAssembly] Fix FastISel of condition in different block (PR51651)	2021-08-31 20:58:25 -07:00
WinCFGuard
WinEH
X86	[SelectionDAGBuilder] Bugfix in visitInlineAsm()	2021-09-08 14:03:50 -07:00
XCore