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llvm-mirror/test/MC
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Robert Khasanov 8a64ff14da [SKX] Extended non-temporal load/store instructions for AVX512VL subsets. 
Added avx512_movnt_vl multiclass for handling 256/128-bit forms of instruction.
Added encoding and lowering tests.

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>

llvm-svn: 215536
2014-08-13 10:46:00 +00:00
..
AArch64
ARM
AsmParser
COFF
Disassembler
ELF
MachO
Markup
Mips
PowerPC
Sparc
SystemZ
X86 [SKX] Extended non-temporal load/store instructions for AVX512VL subsets. 2014-08-13 10:46:00 +00:00