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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00
llvm-mirror/include
Guozhi Wei 7d6ba24baf [X86FixupLEAs] Try again to transform the sequence LEA/SUB to SUB/SUB
This patch transforms the sequence
    lea (reg1, reg2), reg3
    sub reg3, reg4
to two sub instructions
    sub reg1, reg4
    sub reg2, reg4

Similar optimization can also be applied to LEA/ADD sequence.

The modifications to TwoAddressInstructionPass is to ensure the operands of ADD
instruction has expected order (the dest register of LEA should be src register
of ADD).

Differential Revision: https://reviews.llvm.org/D104684
2021-07-16 10:16:03 -07:00
..
llvm [X86FixupLEAs] Try again to transform the sequence LEA/SUB to SUB/SUB 2021-07-16 10:16:03 -07:00
llvm-c [Coroutines] Run coroutine passes by default 2021-07-15 14:33:40 +08:00