mirror of
https://github.com/RPCS3/llvm-mirror.git
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333713f82d
llvm-svn: 366280
112 lines
4.6 KiB
LLVM
112 lines
4.6 KiB
LLVM
; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
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declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
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define void @cdp(i32 %a) #0 {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: %load = load i32, i32* %a.addr, align 4
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; CHECK-NEXT: call void @llvm.arm.cdp(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6)
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%load = load i32, i32* %a.addr, align 4
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call void @llvm.arm.cdp(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6)
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ret void
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}
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declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
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define void @cdp2(i32 %a) #0 {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: %load = load i32, i32* %a.addr, align 4
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; CHECK-NEXT: call void @llvm.arm.cdp2(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6)
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%load = load i32, i32* %a.addr, align 4
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call void @llvm.arm.cdp2(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6)
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ret void
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}
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declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind
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define void @mrrc(i32 %arg0, i32 %arg1, i32 %arg2) #0 {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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; CHECK-NEXT: %ret0 = call { i32, i32 } @llvm.arm.mrrc(i32 %arg0, i32 0, i32 0)
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%ret0 = call { i32, i32 } @llvm.arm.mrrc(i32 %arg0, i32 0, i32 0)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg1
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; CHECK-NEXT: %ret1 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 %arg1, i32 0)
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%ret1 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 %arg1, i32 0)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg2
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; CHECK-NEXT: %ret2 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 0, i32 %arg2)
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%ret2 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 0, i32 %arg2)
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ret void
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}
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declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind
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define void @mrrc2(i32 %arg0, i32 %arg1, i32 %arg2) #0 {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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; CHECK-NEXT: %ret0 = call { i32, i32 } @llvm.arm.mrrc2(i32 %arg0, i32 0, i32 0)
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%ret0 = call { i32, i32 } @llvm.arm.mrrc2(i32 %arg0, i32 0, i32 0)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg1
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; CHECK-NEXT: %ret1 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 %arg1, i32 0)
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%ret1 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 %arg1, i32 0)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg2
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; CHECK-NEXT: %ret2 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 0, i32 %arg2)
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%ret2 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 0, i32 %arg2)
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ret void
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}
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declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
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define void @mcrr(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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; CHECK-NEXT: call void @llvm.arm.mcrr(i32 %arg0, i32 1, i32 2, i32 3, i32 4)
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call void @llvm.arm.mcrr(i32 %arg0, i32 1, i32 2, i32 3, i32 4)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg1
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; CHECK-NEXT: call void @llvm.arm.mcrr(i32 0, i32 %arg1, i32 2, i32 3, i32 4)
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call void @llvm.arm.mcrr(i32 0, i32 %arg1, i32 2, i32 3, i32 4)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg4
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; CHECK-NEXT: call void @llvm.arm.mcrr(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
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call void @llvm.arm.mcrr(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
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ret void
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}
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declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
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define void @mcrr2(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 %arg0, i32 1, i32 2, i32 3, i32 4)
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call void @llvm.arm.mcrr2(i32 %arg0, i32 1, i32 2, i32 3, i32 4)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg1
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; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4)
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call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4)
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg4
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; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
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call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
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ret void
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}
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declare i32 @llvm.arm.space(i32, i32) nounwind
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define i32 @space(i32 %arg0, i32 %arg1) {
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; CHECK: immarg operand has non-immediate parameter
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; CHECK-NEXT: i32 %arg0
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; CHECK-NEXT: call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
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%space = call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
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ret i32 %space
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}
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