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1e7c397a16
The code paths in the absence of TargetMachine, TargetLowering or TargetRegisterInfo are poorly tested. As rL285987 said, requiring TargetPassConfig allows us to delete many (untested) checks littered everywhere. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D73754
61 lines
2.1 KiB
LLVM
61 lines
2.1 KiB
LLVM
; RUN: opt -codegenprepare -S -mtriple=x86_64 < %s | FileCheck %s
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@exit_addr = constant i8* blockaddress(@gep_unmerging, %exit)
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@op1_addr = constant i8* blockaddress(@gep_unmerging, %op1)
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@op2_addr = constant i8* blockaddress(@gep_unmerging, %op2)
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@op3_addr = constant i8* blockaddress(@gep_unmerging, %op3)
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@dummy = global i8 0
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define void @gep_unmerging(i1 %pred, i8* %p0) {
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entry:
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%table = alloca [256 x i8*]
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%table_0 = getelementptr [256 x i8*], [256 x i8*]* %table, i64 0, i64 0
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%table_1 = getelementptr [256 x i8*], [256 x i8*]* %table, i64 0, i64 1
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%table_2 = getelementptr [256 x i8*], [256 x i8*]* %table, i64 0, i64 2
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%table_3 = getelementptr [256 x i8*], [256 x i8*]* %table, i64 0, i64 3
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%exit_a = load i8*, i8** @exit_addr
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%op1_a = load i8*, i8** @op1_addr
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%op2_a = load i8*, i8** @op2_addr
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%op3_a = load i8*, i8** @op3_addr
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store i8* %exit_a, i8** %table_0
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store i8* %op1_a, i8** %table_1
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store i8* %op2_a, i8** %table_2
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store i8* %op3_a, i8** %table_3
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br label %indirectbr
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op1:
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; CHECK-LABEL: op1:
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; CHECK-NEXT: %p1_inc2 = getelementptr i8, i8* %p_preinc, i64 3
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; CHECK-NEXT: %p1_inc1 = getelementptr i8, i8* %p_preinc, i64 2
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%p1_inc2 = getelementptr i8, i8* %p_preinc, i64 3
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%p1_inc1 = getelementptr i8, i8* %p_preinc, i64 2
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%a10 = load i8, i8* %p_postinc
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%a11 = load i8, i8* %p1_inc1
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%a12 = add i8 %a10, %a11
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store i8 %a12, i8* @dummy
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br i1 %pred, label %indirectbr, label %exit
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op2:
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; CHECK-LABEL: op2:
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; CHECK-NEXT: %p2_inc = getelementptr i8, i8* %p_preinc, i64 2
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%p2_inc = getelementptr i8, i8* %p_preinc, i64 2
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%a2 = load i8, i8* %p_postinc
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store i8 %a2, i8* @dummy
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br i1 %pred, label %indirectbr, label %exit
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op3:
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br i1 %pred, label %indirectbr, label %exit
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indirectbr:
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%p_preinc = phi i8* [%p0, %entry], [%p1_inc2, %op1], [%p2_inc, %op2], [%p_postinc, %op3]
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%p_postinc = getelementptr i8, i8* %p_preinc, i64 1
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%next_op = load i8, i8* %p_preinc
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%p_zext = zext i8 %next_op to i64
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%slot = getelementptr [256 x i8*], [256 x i8*]* %table, i64 0, i64 %p_zext
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%target = load i8*, i8** %slot
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indirectbr i8* %target, [label %exit, label %op1, label %op2]
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exit:
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ret void
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}
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