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llvm-mirror/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
Clement Courbet 7f1e47f301 [CodeGen] Fix the computation of the alignment of split stores.
Summary:
Right now the alignment of the lower half of a store is computed as
align/2, which fails for unaligned stores (align = 1), and is overly
pessimitic for, e.g. a 8 byte store aligned to 4 bytes.
Fixes PR44851
Fixes PR44877

Reviewers: gchatelet, spatel, lebedev.ri

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74311
2020-02-12 10:37:30 +01:00

75 lines
2.9 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -codegenprepare -mtriple=x86_64-unknown-unknown -force-split-store -S < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-w64-windows-gnu"
define void @split_store_align1(float %x, i64* %p) {
; CHECK-LABEL: @split_store_align1(
; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 1
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 1
; CHECK-NEXT: ret void
;
%b = bitcast float %x to i32
%z = zext i32 0 to i64
%s = shl nuw nsw i64 %z, 32
%z2 = zext i32 %b to i64
%o = or i64 %s, %z2
store i64 %o, i64* %p, align 1
ret void
}
define void @split_store_align2(float %x, i64* %p) {
; CHECK-LABEL: @split_store_align2(
; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 2
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 2
; CHECK-NEXT: ret void
;
%b = bitcast float %x to i32
%z = zext i32 0 to i64
%s = shl nuw nsw i64 %z, 32
%z2 = zext i32 %b to i64
%o = or i64 %s, %z2
store i64 %o, i64* %p, align 2
ret void
}
define void @split_store_align8(float %x, i64* %p) {
; CHECK-LABEL: @split_store_align8(
; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64
; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64
; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32*
; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 4
; CHECK-NEXT: ret void
;
%b = bitcast float %x to i32
%z = zext i32 0 to i64
%s = shl nuw nsw i64 %z, 32
%z2 = zext i32 %b to i64
%o = or i64 %s, %z2
store i64 %o, i64* %p, align 8
ret void
}