mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-31 07:52:55 +01:00
7e501cf4c3
This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
77 lines
1.4 KiB
LLVM
77 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
|
|
define i32 @ashr(i32 %a, i32 %b) {
|
|
%1 = ashr i32 %a, %b
|
|
ret i32 %1
|
|
}
|
|
; CHECK-LABEL: ashr:
|
|
; CHECK-NEXT: ashr r0, r0, r1
|
|
|
|
define i32 @ashri1(i32 %a) {
|
|
%1 = ashr i32 %a, 24
|
|
ret i32 %1
|
|
}
|
|
; CHECK-LABEL: ashri1:
|
|
; CHECK-NEXT: ashr r0, r0, 24
|
|
|
|
define i32 @ashri2(i32 %a) {
|
|
%1 = ashr i32 %a, 31
|
|
ret i32 %1
|
|
}
|
|
; CHECK-LABEL: ashri2:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
|
|
define i32 @f1(i32 %a) {
|
|
%1 = icmp slt i32 %a, 0
|
|
br i1 %1, label %less, label %not_less
|
|
less:
|
|
ret i32 10
|
|
not_less:
|
|
ret i32 17
|
|
}
|
|
; CHECK-LABEL: f1:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
; CHECK-NEXT: bt r0
|
|
|
|
define i32 @f2(i32 %a) {
|
|
%1 = icmp sge i32 %a, 0
|
|
br i1 %1, label %greater, label %not_greater
|
|
greater:
|
|
ret i32 10
|
|
not_greater:
|
|
ret i32 17
|
|
}
|
|
; CHECK-LABEL: f2:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
; CHECK-NEXT: bt r0
|
|
|
|
define i32 @f3(i32 %a) {
|
|
%1 = icmp slt i32 %a, 0
|
|
%2 = select i1 %1, i32 10, i32 17
|
|
ret i32 %2
|
|
}
|
|
; CHECK-LABEL: f3:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
; CHECK-NEXT: bt r0
|
|
; CHECK-NEXT: ldc r0, 17
|
|
; CHECK: ldc r0, 10
|
|
|
|
define i32 @f4(i32 %a) {
|
|
%1 = icmp sge i32 %a, 0
|
|
%2 = select i1 %1, i32 10, i32 17
|
|
ret i32 %2
|
|
}
|
|
; CHECK-LABEL: f4:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
; CHECK-NEXT: bt r0
|
|
; CHECK-NEXT: ldc r0, 10
|
|
; CHECK: ldc r0, 17
|
|
|
|
define i32 @f5(i32 %a) {
|
|
%1 = icmp sge i32 %a, 0
|
|
%2 = zext i1 %1 to i32
|
|
ret i32 %2
|
|
}
|
|
; CHECK-LABEL: f5:
|
|
; CHECK-NEXT: ashr r0, r0, 32
|
|
; CHECK-NEXT: eq r0, r0, 0
|