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https://github.com/RPCS3/llvm-mirror.git
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0e9ece99bb
llvm-svn: 123189
32 lines
1.3 KiB
ArmAsm
32 lines
1.3 KiB
ArmAsm
@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
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@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xf3]
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vcnt.8 d16, d16
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@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xf3]
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vcnt.8 q8, q8
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@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xf3]
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vclz.i8 d16, d16
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@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xf3]
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vclz.i16 d16, d16
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@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xf3]
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vclz.i32 d16, d16
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@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xf3]
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vclz.i8 q8, q8
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@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xf3]
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vclz.i16 q8, q8
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@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xf3]
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vclz.i32 q8, q8
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@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xf3]
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vcls.s8 d16, d16
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@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xf3]
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vcls.s16 d16, d16
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@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xf3]
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vcls.s32 d16, d16
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@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xf3]
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vcls.s8 q8, q8
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@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xf3]
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vcls.s16 q8, q8
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@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xf3]
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vcls.s32 q8, q8
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