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2d02d8085a
PPCISelDAGToDAG has a transformation that generates a rlwimi instruction from an input pattern that looks like this: and(or(x, c1), c2) but the associated logic does not work if there are bits that are 1 in c1 but 0 in c2 (these are normally canonicalized away, but that can't happen if the 'or' has other users. Make sure we abort the transformation if such bits are discovered. Fixes PR24704. llvm-svn: 246900
28 lines
584 B
LLVM
28 lines
584 B
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@m = external global i32, align 4
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; Function Attrs: nounwind
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define signext i32 @main() #0 {
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entry:
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; CHECK-LABEL: @main
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; CHECK-NOT: rlwimi
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; CHECK: andi
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%0 = load i32, i32* @m, align 4
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%or = or i32 %0, 250
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store i32 %or, i32* @m, align 4
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%and = and i32 %or, 249
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%sub.i = sub i32 %and, 0
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%sext = shl i32 %sub.i, 24
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%conv = ashr exact i32 %sext, 24
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ret i32 %conv
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}
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attributes #0 = { nounwind "target-cpu"="pwr7" }
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attributes #1 = { nounwind }
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