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80d5f68422
Return is now considered a predicable instruction, and is converted to a newly-added CondReturn (which maps to BCR to %r14) instruction by the if conversion pass. Also, fused compare-and-branch transform knows about conditional returns, emitting the proper fused instructions for them. This transform triggers on a *lot* of tests, hence the huge diffstat. The changes are mostly jX to br %r14 -> bXr %r14. Author: koriakin Differential Revision: http://reviews.llvm.org/D17339 llvm-svn: 265689
238 lines
6.3 KiB
LLVM
238 lines
6.3 KiB
LLVM
; Test 64-bit signed comparisons between memory and a constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check ordered comparisons with 0.
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define double @f1(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: cghsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check ordered comparisons with 1.
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define double @f2(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: cghsi 0(%r2), 0
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; CHECK-NEXT: bler %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check ordered comparisons with the high end of the signed 16-bit range.
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define double @f3(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK: cghsi 0(%r2), 32767
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 32767
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value up, which can't use CGHSI.
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define double @f4(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: cghsi
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 32768
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check ordered comparisons with -1.
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define double @f5(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK: cghsi 0(%r2), -1
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, -1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check ordered comparisons with the low end of the 16-bit signed range.
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define double @f6(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f6:
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; CHECK: cghsi 0(%r2), -32768
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, -32768
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value down, which should be treated as a positive value.
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define double @f7(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f7:
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; CHECK-NOT: cghsi
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, -32769
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with 0.
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define double @f8(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f8:
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; CHECK: cghsi 0(%r2), 0
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; CHECK-NEXT: ber %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with 1.
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define double @f9(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f9:
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; CHECK: cghsi 0(%r2), 1
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; CHECK-NEXT: ber %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with the high end of the signed 16-bit range.
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define double @f10(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f10:
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; CHECK: cghsi 0(%r2), 32767
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; CHECK-NEXT: ber %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, 32767
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value up, which can't use CGHSI.
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define double @f11(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f11:
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; CHECK-NOT: cghsi
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, 32768
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with -1.
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define double @f12(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f12:
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; CHECK: cghsi 0(%r2), -1
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; CHECK-NEXT: ber %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, -1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with the low end of the 16-bit signed range.
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define double @f13(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f13:
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; CHECK: cghsi 0(%r2), -32768
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; CHECK-NEXT: ber %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, -32768
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value down, which should be treated as a positive value.
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define double @f14(double %a, double %b, i64 *%ptr) {
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; CHECK-LABEL: f14:
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; CHECK-NOT: cghsi
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr
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%cond = icmp eq i64 %val, -32769
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the CGHSI range.
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define double @f15(double %a, double %b, i64 %i1, i64 *%base) {
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; CHECK-LABEL: f15:
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; CHECK: cghsi 4088(%r3), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 511
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword up, which needs separate address logic,
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define double @f16(double %a, double %b, i64 *%base) {
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; CHECK-LABEL: f16:
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; CHECK: aghi %r2, 4096
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; CHECK: cghsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 512
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check negative offsets, which also need separate address logic.
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define double @f17(double %a, double %b, i64 *%base) {
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; CHECK-LABEL: f17:
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; CHECK: aghi %r2, -8
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; CHECK: cghsi 0(%r2), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%base, i64 -1
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CGHSI does not allow indices.
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define double @f18(double %a, double %b, i64 %base, i64 %index) {
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; CHECK-LABEL: f18:
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; CHECK: agr {{%r2, %r3|%r3, %r2}}
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; CHECK: cghsi 0({{%r[23]}}), 0
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i64 *
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%val = load i64 , i64 *%ptr
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%cond = icmp slt i64 %val, 0
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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