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d09b64fc25
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558
78 lines
1.8 KiB
LLVM
78 lines
1.8 KiB
LLVM
; RUN: llc < %s -join-physregs -mcpu=generic -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=M64
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; RUN: llc < %s -join-physregs -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
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; RUN: llc < %s -join-physregs -mcpu=generic -mtriple=x86_64-win32-macho | FileCheck %s -check-prefix=EFI
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; PR8777
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; PR8778
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; Passing the same value in two registers creates a false interference that
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; only -join-physregs resolves. It could also be handled by a parallel copy.
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define i64 @foo(i64 %n, i64 %x) nounwind {
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entry:
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%buf0 = alloca i8, i64 4096, align 1
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; ___chkstk must adjust %rsp.
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; M64: movq %rsp, %rbp
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; M64: $4096, %rax
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; M64: callq ___chkstk
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; M64-NOT: %rsp
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; __chkstk does not adjust %rsp.
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; W64: movq %rsp, %rbp
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; W64: $4096, %rax
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; W64: callq __chkstk
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; W64: subq $4096, %rsp
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; Freestanding
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; EFI: movq %rsp, %rbp
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; EFI: $[[B0OFS:4096|4104]], %rsp
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; EFI-NOT: call
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%buf1 = alloca i8, i64 %n, align 1
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; M64: leaq 15(%rcx), %rax
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; M64: andq $-16, %rax
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; M64: callq ___chkstk
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; M64-NOT: %rsp
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; M64: movq %rsp, %rax
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; W64: leaq 15(%rcx), %rax
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; W64: andq $-16, %rax
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; W64: callq __chkstk
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; W64: subq %rax, %rsp
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; W64: movq %rsp, %rax
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; EFI: leaq 15(%rcx), [[R1:%r.*]]
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; EFI: andq $-16, [[R1]]
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; EFI: movq %rsp, [[R64:%r.*]]
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; EFI: subq [[R1]], [[R64]]
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; EFI: movq [[R64]], %rsp
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%r = call i64 @bar(i64 %n, i64 %x, i64 %n, i8* %buf0, i8* %buf1) nounwind
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; M64: subq $48, %rsp
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; M64: leaq -4096(%rbp), %r9
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; M64: movq %rax, 32(%rsp)
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; M64: callq bar
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; W64: subq $48, %rsp
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; W64: leaq -4096(%rbp), %r9
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; W64: movq %rax, 32(%rsp)
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; W64: callq bar
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; EFI: subq $48, %rsp
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; EFI: leaq -[[B0OFS]](%rbp), %r9
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; EFI: movq [[R64]], 32(%rsp)
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; EFI: callq _bar
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ret i64 %r
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; M64: movq %rbp, %rsp
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; W64: movq %rbp, %rsp
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}
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declare i64 @bar(i64, i64, i64, i8* nocapture, i8* nocapture) nounwind
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