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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
108 lines
2.8 KiB
LLVM
108 lines
2.8 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
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; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
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; RUN: llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
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; RUN: llc < %s -mtriple=armv6-apple-ios | FileCheck %s -check-prefix=ARMV6
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; RUN: llc < %s -mtriple=thumbv7m-apple-ios | FileCheck %s -check-prefix=THUMBM
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define void @test1(i32* %ptr, i32 %val1) {
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; ARM-LABEL: test1
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; ARM: dmb {{ish$}}
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; ARM-NEXT: str
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; ARM-NEXT: dmb {{ish$}}
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; THUMBONE-LABEL: test1
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; THUMBONE: __sync_lock_test_and_set_4
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; THUMBTWO-LABEL: test1
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; THUMBTWO: dmb {{ish$}}
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; THUMBTWO-NEXT: str
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; THUMBTWO-NEXT: dmb {{ish$}}
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; ARMV6-LABEL: test1
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; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
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; ARMV6: str
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; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
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; THUMBM-LABEL: test1
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; THUMBM: dmb sy
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; THUMBM: str
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; THUMBM: dmb sy
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store atomic i32 %val1, i32* %ptr seq_cst, align 4
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ret void
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}
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define i32 @test2(i32* %ptr) {
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; ARM-LABEL: test2
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; ARM: ldr
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; ARM-NEXT: dmb {{ish$}}
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; THUMBONE-LABEL: test2
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; THUMBONE: __sync_val_compare_and_swap_4
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; THUMBTWO-LABEL: test2
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; THUMBTWO: ldr
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; THUMBTWO-NEXT: dmb {{ish$}}
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; ARMV6-LABEL: test2
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; ARMV6: ldr
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; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
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; THUMBM-LABEL: test2
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; THUMBM: ldr
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; THUMBM: dmb sy
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%val = load atomic i32, i32* %ptr seq_cst, align 4
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ret i32 %val
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}
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define void @test3(i8* %ptr1, i8* %ptr2) {
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; ARM-LABEL: test3
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; ARM-NOT: dmb
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; ARM: ldrb
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; ARM-NOT: dmb
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; ARM: strb
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; ARM-NOT: dmb
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; ARM: bx lr
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; THUMBTWO-LABEL: test3
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; THUMBTWO-NOT: dmb
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; THUMBTWO: ldrb
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; THUMBTWO-NOT: dmb
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; THUMBTWO: strb
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; THUMBTWO-NOT: dmb
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; THUMBTWO: bx lr
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; THUMBONE-LABEL: test3
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; THUMBONE-NOT: dmb
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; THUMBONE: ldrb
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; THUMBONE-NOT: dmb
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; THUMBONE: strb
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; THUMBONE-NOT: dmb
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; ARMV6-LABEL: test3
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; ARMV6-NOT: mcr
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; THUMBM-LABEL: test3
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; THUMBM-NOT: dmb sy
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%val = load atomic i8, i8* %ptr1 unordered, align 1
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store atomic i8 %val, i8* %ptr2 unordered, align 1
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ret void
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}
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define void @test4(i8* %ptr1, i8* %ptr2) {
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; THUMBONE-LABEL: test4
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; THUMBONE: ___sync_val_compare_and_swap_1
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; THUMBONE: ___sync_lock_test_and_set_1
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; ARMV6-LABEL: test4
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; THUMBM-LABEL: test4
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%val = load atomic i8, i8* %ptr1 seq_cst, align 1
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store atomic i8 %val, i8* %ptr2 seq_cst, align 1
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ret void
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}
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define i64 @test_old_load_64bit(i64* %p) {
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; ARMV4-LABEL: test_old_load_64bit
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; ARMV4: ___sync_val_compare_and_swap_8
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%1 = load atomic i64, i64* %p seq_cst, align 8
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ret i64 %1
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}
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define void @test_old_store_64bit(i64* %p, i64 %v) {
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; ARMV4-LABEL: test_old_store_64bit
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; ARMV4: ___sync_lock_test_and_set_8
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store atomic i64 %v, i64* %p seq_cst, align 8
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ret void
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}
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