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llvm-mirror/lib/Target/Hexagon
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Rafael Espindola 22e87bbb08 Delete Reloc::Default. 
Having an enum member named Default is quite confusing: Is it distinct
from the others?

This patch removes that member and instead uses Optional<Reloc> in
places where we have a user input that still hasn't been maped to the
default value, which is now clear has no be one of the remaining 3
options.

llvm-svn: 269988
2016-05-18 22:04:49 +00:00
..
AsmParser [Hexagon] Define certain aliases for vector instructions 2016-04-28 16:43:16 +00:00
Disassembler [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
MCTargetDesc Delete Reloc::Default. 2016-05-18 22:04:49 +00:00
TargetInfo
BitTracker.cpp
BitTracker.h
CMakeLists.txt Touch Hexagon/CMakeLists.txt to regenerate build files, since r268641 complains of missing HexagonAlias.td on ninja. 2016-05-05 19:28:01 +00:00
Hexagon.h
Hexagon.td [Hexagon] Merge HexagonAlias.td into HexagonInstrAlias.td, NFC 2016-05-05 16:19:36 +00:00
HexagonAsmPrinter.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonAsmPrinter.h
HexagonBitSimplify.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonBitTracker.cpp
HexagonBitTracker.h
HexagonBlockRanges.cpp [Hexagon] Properly close live range in HexagonBlockRanges 2016-04-22 17:27:22 +00:00
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp [Hexagon] Implement branch relaxation 2016-04-19 18:30:18 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp [scan-build] fix warnings emitted on LLVM Hexagon code base 2016-05-05 22:00:44 +00:00
HexagonCommonGEP.cpp [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 2016-05-13 13:13:59 +00:00
HexagonCopyToCombine.cpp Add MachineFunctionProperty checks for AllVRegsAllocated for target passes 2016-04-04 17:09:25 +00:00
HexagonEarlyIfConv.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonExpandCondsets.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonFixupHwLoops.cpp [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 2016-05-13 13:13:59 +00:00
HexagonFrameLowering.cpp [Hexagon] Make getCallerSavedRegs specific to a register class 2016-05-16 18:02:28 +00:00
HexagonFrameLowering.h [Hexagon] Register save/restore functions do not follow regular conventions 2016-04-25 17:49:44 +00:00
HexagonGenExtract.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenInsert.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenMux.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenPredicate.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonHardwareLoops.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonInstrAlias.td [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
HexagonInstrEnc.td
HexagonInstrFormats.td
HexagonInstrFormatsV4.td
HexagonInstrFormatsV60.td
HexagonInstrInfo.cpp [Hexagon] Simplify HexagonInstrInfo::isPredicable 2016-05-16 16:56:10 +00:00
HexagonInstrInfo.h [Hexagon] Optimize addressing modes for load/store 2016-04-29 15:49:13 +00:00
HexagonInstrInfo.td [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
HexagonInstrInfoV3.td [Hexagon] Register save/restore functions do not follow regular conventions 2016-04-25 17:49:44 +00:00
HexagonInstrInfoV4.td [Hexagon] Register save/restore functions do not follow regular conventions 2016-04-25 17:49:44 +00:00
HexagonInstrInfoV5.td
HexagonInstrInfoV60.td [Hexagon] Improve handling of unaligned vector loads and stores 2016-03-28 15:43:03 +00:00
HexagonInstrInfoVector.td
HexagonIntrinsics.td [Hexagon] Handle operand type differences for A2_tfrpi 2016-05-05 15:29:47 +00:00
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV5.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV60.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonISelDAGToDAG.cpp [Hexagon] Remove dead nodes from SelectionDAG to avoid cycles 2016-05-13 18:48:15 +00:00
HexagonISelLowering.cpp [Hexagon] Recognize "q" and "v" in inline-asm as register constraints 2016-05-18 14:34:51 +00:00
HexagonISelLowering.h [Hexagon] Recognize "q" and "v" in inline-asm as register constraints 2016-05-18 14:34:51 +00:00
HexagonIsetDx.td
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h [Hexagon] Speed up frame lowering when no optimizations are enabled 2016-03-28 14:42:03 +00:00
HexagonMachineScheduler.cpp CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC 2016-02-27 19:09:00 +00:00
HexagonMachineScheduler.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonMCInstLower.cpp [Hexagon] Using MustExtend flag on expression instead of passing around bools. 2016-02-29 18:39:51 +00:00
HexagonNewValueJump.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonOperands.td
HexagonOptAddrMode.cpp Fix NDEBUG build: variables used only in debug code causing compile error 2016-04-29 16:14:00 +00:00
HexagonOptimizeSZextends.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonPeephole.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonRDF.cpp
HexagonRDF.h
HexagonRDFOpt.cpp [RDF] Add option to keep dead phi nodes in DFG 2016-04-28 20:17:06 +00:00
HexagonRegisterInfo.cpp [Hexagon] Make getCallerSavedRegs specific to a register class 2016-05-16 18:02:28 +00:00
HexagonRegisterInfo.h [Hexagon] Make getCallerSavedRegs specific to a register class 2016-05-16 18:02:28 +00:00
HexagonRegisterInfo.td [Hexagon] Properly recognize register alt names 2016-04-21 19:49:53 +00:00
HexagonSchedule.td
HexagonScheduleV4.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonScheduleV55.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonScheduleV60.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonSplitDouble.cpp [MIB] Create a helper function getRegState to extract all register flags 2016-05-13 13:01:19 +00:00
HexagonStoreWidening.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonSubtarget.cpp
HexagonSubtarget.h
HexagonSystemInst.td [Hexagon] Add definitions for trap/pause instructions 2016-04-22 16:25:00 +00:00
HexagonTargetMachine.cpp Delete Reloc::Default. 2016-05-18 22:04:49 +00:00
HexagonTargetMachine.h Delete Reloc::Default. 2016-05-18 22:04:49 +00:00
HexagonTargetObjectFile.cpp [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonTargetObjectFile.h [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp
HexagonTargetTransformInfo.h
HexagonVLIWPacketizer.cpp [Hexagon] Be careful about anti-dependencies with a call in packetizer 2016-05-06 19:13:38 +00:00
HexagonVLIWPacketizer.h CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC 2016-02-27 19:09:00 +00:00
LLVMBuild.txt
RDFCopy.cpp [RDF] Handle undefined registers in RDF copy propagation 2016-04-28 15:09:19 +00:00
RDFCopy.h
RDFDeadCode.cpp
RDFDeadCode.h
RDFGraph.cpp [scan-build] fix warnings emitted on LLVM Hexagon code base 2016-05-05 22:00:44 +00:00
RDFGraph.h [RDF] Add option to keep dead phi nodes in DFG 2016-04-28 20:17:06 +00:00
RDFLiveness.cpp [Hexagon] Optimize addressing modes for load/store 2016-04-29 15:49:13 +00:00
RDFLiveness.h [Hexagon] Optimize addressing modes for load/store 2016-04-29 15:49:13 +00:00