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7193bf43c5
When the memory vectorizer is enabled, these tests break. These tests don't really care about the memory instructions, and it's easier to write check lines with the unmerged loads. llvm-svn: 266071
25 lines
1.3 KiB
LLVM
25 lines
1.3 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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declare double @llvm.maxnum.f64(double, double) nounwind readnone
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; SI-LABEL: {{^}}test_fmax3_f64:
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; SI-DAG: buffer_load_dwordx2 [[REGA:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0{{$}}
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; SI-DAG: buffer_load_dwordx2 [[REGB:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:8
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; SI-DAG: buffer_load_dwordx2 [[REGC:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:16
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; SI: v_max_f64 [[REGA]], [[REGA]], [[REGB]]
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; SI: v_max_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[REGA]], [[REGC]]
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; SI: buffer_store_dwordx2 [[RESULT]],
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; SI: s_endpgm
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define void @test_fmax3_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) nounwind {
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%bptr = getelementptr double, double addrspace(1)* %aptr, i32 1
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%cptr = getelementptr double, double addrspace(1)* %aptr, i32 2
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%a = load volatile double, double addrspace(1)* %aptr, align 8
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%b = load volatile double, double addrspace(1)* %bptr, align 8
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%c = load volatile double, double addrspace(1)* %cptr, align 8
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%f0 = call double @llvm.maxnum.f64(double %a, double %b) nounwind readnone
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%f1 = call double @llvm.maxnum.f64(double %f0, double %c) nounwind readnone
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store double %f1, double addrspace(1)* %out, align 8
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ret void
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}
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