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3a2064d3a0
The IEEE-754 Standard makes it clear that fneg(x) and fsub(-0.0, x) are two different operations. The former is a bitwise operation, while the latter is an arithmetic operation. This patch creates a dedicated FNeg IR Instruction to model that behavior. Differential Revision: https://reviews.llvm.org/D53877 llvm-svn: 346774
62 lines
1.6 KiB
LLVM
62 lines
1.6 KiB
LLVM
; Basic sanity test to check that instruction operands are encoded with
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; relative IDs.
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; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
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; RUN: verify-uselistorder < %s
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; CHECK: FUNCTION_BLOCK
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; CHECK: INST_UNOP {{.*}}op0=1
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; CHECK: INST_RET {{.*}}op0=1
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define double @test_float_unops(double %a) nounwind {
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%1 = fneg double %a
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ret double %1
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}
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; CHECK: FUNCTION_BLOCK
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_RET {{.*}}op0=1
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define i32 @test_int_binops(i32 %a) nounwind {
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entry:
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%0 = add i32 %a, %a
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%1 = sub i32 %0, %0
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%2 = mul i32 %1, %1
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ret i32 %2
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}
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; CHECK: FUNCTION_BLOCK
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; CHECK: INST_CAST {{.*}}op0=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_BINOP {{.*}}op0=1 op1=1
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; CHECK: INST_RET {{.*}}op0=1
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define double @test_float_binops(i32 %a) nounwind {
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%1 = sitofp i32 %a to double
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%2 = fadd double %1, %1
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%3 = fsub double %2, %2
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%4 = fmul double %3, %3
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%5 = fdiv double %4, %4
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ret double %5
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}
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; CHECK: FUNCTION_BLOCK
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; skip checking operands of INST_GEP since that depends on ordering
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; between literals and the formal parameters.
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; CHECK: INST_GEP {{.*}}
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; CHECK: INST_LOAD {{.*}}op0=1 {{.*}}
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; CHECK: INST_CMP2 op0=1 {{.*}}
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; CHECK: INST_RET {{.*}}op0=1
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define i1 @test_load(i32 %a, {i32, i32}* %ptr) nounwind {
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entry:
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%0 = getelementptr inbounds {i32, i32}, {i32, i32}* %ptr, i32 %a, i32 0
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%1 = load i32, i32* %0
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%2 = icmp eq i32 %1, %a
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ret i1 %2
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}
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; CHECK: Stream type: LLVM IR
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