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8cd06abbb1
As promised in D98866
615 lines
22 KiB
C++
615 lines
22 KiB
C++
//===-- KnownBits.cpp - Stores known zeros/ones ---------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a class for representing known zeros and ones used by
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// computeKnownBits.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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using namespace llvm;
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static KnownBits computeForAddCarry(
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const KnownBits &LHS, const KnownBits &RHS,
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bool CarryZero, bool CarryOne) {
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assert(!(CarryZero && CarryOne) &&
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"Carry can't be zero and one at the same time");
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APInt PossibleSumZero = LHS.getMaxValue() + RHS.getMaxValue() + !CarryZero;
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APInt PossibleSumOne = LHS.getMinValue() + RHS.getMinValue() + CarryOne;
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// Compute known bits of the carry.
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APInt CarryKnownZero = ~(PossibleSumZero ^ LHS.Zero ^ RHS.Zero);
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APInt CarryKnownOne = PossibleSumOne ^ LHS.One ^ RHS.One;
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// Compute set of known bits (where all three relevant bits are known).
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APInt LHSKnownUnion = LHS.Zero | LHS.One;
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APInt RHSKnownUnion = RHS.Zero | RHS.One;
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APInt CarryKnownUnion = std::move(CarryKnownZero) | CarryKnownOne;
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APInt Known = std::move(LHSKnownUnion) & RHSKnownUnion & CarryKnownUnion;
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assert((PossibleSumZero & Known) == (PossibleSumOne & Known) &&
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"known bits of sum differ");
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// Compute known bits of the result.
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KnownBits KnownOut;
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KnownOut.Zero = ~std::move(PossibleSumZero) & Known;
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KnownOut.One = std::move(PossibleSumOne) & Known;
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return KnownOut;
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}
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KnownBits KnownBits::computeForAddCarry(
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const KnownBits &LHS, const KnownBits &RHS, const KnownBits &Carry) {
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assert(Carry.getBitWidth() == 1 && "Carry must be 1-bit");
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return ::computeForAddCarry(
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LHS, RHS, Carry.Zero.getBoolValue(), Carry.One.getBoolValue());
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}
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KnownBits KnownBits::computeForAddSub(bool Add, bool NSW,
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const KnownBits &LHS, KnownBits RHS) {
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KnownBits KnownOut;
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if (Add) {
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// Sum = LHS + RHS + 0
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KnownOut = ::computeForAddCarry(
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LHS, RHS, /*CarryZero*/true, /*CarryOne*/false);
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} else {
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// Sum = LHS + ~RHS + 1
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std::swap(RHS.Zero, RHS.One);
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KnownOut = ::computeForAddCarry(
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LHS, RHS, /*CarryZero*/false, /*CarryOne*/true);
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}
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// Are we still trying to solve for the sign bit?
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if (!KnownOut.isNegative() && !KnownOut.isNonNegative()) {
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if (NSW) {
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// Adding two non-negative numbers, or subtracting a negative number from
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// a non-negative one, can't wrap into negative.
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if (LHS.isNonNegative() && RHS.isNonNegative())
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KnownOut.makeNonNegative();
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// Adding two negative numbers, or subtracting a non-negative number from
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// a negative one, can't wrap into non-negative.
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else if (LHS.isNegative() && RHS.isNegative())
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KnownOut.makeNegative();
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}
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}
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return KnownOut;
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}
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KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const {
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unsigned BitWidth = getBitWidth();
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assert(0 < SrcBitWidth && SrcBitWidth <= BitWidth &&
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"Illegal sext-in-register");
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if (SrcBitWidth == BitWidth)
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return *this;
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unsigned ExtBits = BitWidth - SrcBitWidth;
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KnownBits Result;
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Result.One = One << ExtBits;
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Result.Zero = Zero << ExtBits;
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Result.One.ashrInPlace(ExtBits);
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Result.Zero.ashrInPlace(ExtBits);
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return Result;
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}
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KnownBits KnownBits::makeGE(const APInt &Val) const {
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// Count the number of leading bit positions where our underlying value is
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// known to be less than or equal to Val.
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unsigned N = (Zero | Val).countLeadingOnes();
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// For each of those bit positions, if Val has a 1 in that bit then our
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// underlying value must also have a 1.
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APInt MaskedVal(Val);
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MaskedVal.clearLowBits(getBitWidth() - N);
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return KnownBits(Zero, One | MaskedVal);
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}
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KnownBits KnownBits::umax(const KnownBits &LHS, const KnownBits &RHS) {
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// If we can prove that LHS >= RHS then use LHS as the result. Likewise for
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// RHS. Ideally our caller would already have spotted these cases and
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// optimized away the umax operation, but we handle them here for
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// completeness.
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if (LHS.getMinValue().uge(RHS.getMaxValue()))
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return LHS;
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if (RHS.getMinValue().uge(LHS.getMaxValue()))
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return RHS;
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// If the result of the umax is LHS then it must be greater than or equal to
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// the minimum possible value of RHS. Likewise for RHS. Any known bits that
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// are common to these two values are also known in the result.
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KnownBits L = LHS.makeGE(RHS.getMinValue());
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KnownBits R = RHS.makeGE(LHS.getMinValue());
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return KnownBits::commonBits(L, R);
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}
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KnownBits KnownBits::umin(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [0, 0xFFFFFFFF] <-> [0xFFFFFFFF, 0]
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auto Flip = [](const KnownBits &Val) { return KnownBits(Val.One, Val.Zero); };
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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KnownBits KnownBits::smax(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [-0x80000000, 0x7FFFFFFF] <-> [0, 0xFFFFFFFF]
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auto Flip = [](const KnownBits &Val) {
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unsigned SignBitPosition = Val.getBitWidth() - 1;
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APInt Zero = Val.Zero;
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APInt One = Val.One;
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Zero.setBitVal(SignBitPosition, Val.One[SignBitPosition]);
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One.setBitVal(SignBitPosition, Val.Zero[SignBitPosition]);
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return KnownBits(Zero, One);
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};
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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KnownBits KnownBits::smin(const KnownBits &LHS, const KnownBits &RHS) {
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// Flip the range of values: [-0x80000000, 0x7FFFFFFF] <-> [0xFFFFFFFF, 0]
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auto Flip = [](const KnownBits &Val) {
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unsigned SignBitPosition = Val.getBitWidth() - 1;
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APInt Zero = Val.One;
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APInt One = Val.Zero;
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Zero.setBitVal(SignBitPosition, Val.Zero[SignBitPosition]);
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One.setBitVal(SignBitPosition, Val.One[SignBitPosition]);
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return KnownBits(Zero, One);
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};
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return Flip(umax(Flip(LHS), Flip(RHS)));
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}
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KnownBits KnownBits::shl(const KnownBits &LHS, const KnownBits &RHS) {
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unsigned BitWidth = LHS.getBitWidth();
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KnownBits Known(BitWidth);
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// If the shift amount is a valid constant then transform LHS directly.
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if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
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unsigned Shift = RHS.getConstant().getZExtValue();
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Known = LHS;
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Known.Zero <<= Shift;
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Known.One <<= Shift;
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// Low bits are known zero.
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Known.Zero.setLowBits(Shift);
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return Known;
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}
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// No matter the shift amount, the trailing zeros will stay zero.
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unsigned MinTrailingZeros = LHS.countMinTrailingZeros();
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// Minimum shift amount low bits are known zero.
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APInt MinShiftAmount = RHS.getMinValue();
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if (MinShiftAmount.ult(BitWidth)) {
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MinTrailingZeros += MinShiftAmount.getZExtValue();
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MinTrailingZeros = std::min(MinTrailingZeros, BitWidth);
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}
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// If the maximum shift is in range, then find the common bits from all
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// possible shifts.
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APInt MaxShiftAmount = RHS.getMaxValue();
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if (MaxShiftAmount.ult(BitWidth) && !LHS.isUnknown()) {
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uint64_t ShiftAmtZeroMask = (~RHS.Zero).getZExtValue();
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uint64_t ShiftAmtOneMask = RHS.One.getZExtValue();
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assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
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Known.Zero.setAllBits();
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Known.One.setAllBits();
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for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
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MaxShiftAmt = MaxShiftAmount.getZExtValue();
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ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
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// Skip if the shift amount is impossible.
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if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
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(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
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continue;
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KnownBits SpecificShift;
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SpecificShift.Zero = LHS.Zero << ShiftAmt;
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SpecificShift.One = LHS.One << ShiftAmt;
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Known = KnownBits::commonBits(Known, SpecificShift);
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if (Known.isUnknown())
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break;
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}
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}
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Known.Zero.setLowBits(MinTrailingZeros);
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return Known;
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}
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KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS) {
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unsigned BitWidth = LHS.getBitWidth();
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KnownBits Known(BitWidth);
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if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
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unsigned Shift = RHS.getConstant().getZExtValue();
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Known = LHS;
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Known.Zero.lshrInPlace(Shift);
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Known.One.lshrInPlace(Shift);
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// High bits are known zero.
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Known.Zero.setHighBits(Shift);
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return Known;
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}
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// No matter the shift amount, the leading zeros will stay zero.
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unsigned MinLeadingZeros = LHS.countMinLeadingZeros();
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// Minimum shift amount high bits are known zero.
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APInt MinShiftAmount = RHS.getMinValue();
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if (MinShiftAmount.ult(BitWidth)) {
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MinLeadingZeros += MinShiftAmount.getZExtValue();
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MinLeadingZeros = std::min(MinLeadingZeros, BitWidth);
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}
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// If the maximum shift is in range, then find the common bits from all
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// possible shifts.
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APInt MaxShiftAmount = RHS.getMaxValue();
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if (MaxShiftAmount.ult(BitWidth) && !LHS.isUnknown()) {
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uint64_t ShiftAmtZeroMask = (~RHS.Zero).getZExtValue();
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uint64_t ShiftAmtOneMask = RHS.One.getZExtValue();
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assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
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Known.Zero.setAllBits();
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Known.One.setAllBits();
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for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
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MaxShiftAmt = MaxShiftAmount.getZExtValue();
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ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
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// Skip if the shift amount is impossible.
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if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
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(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
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continue;
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KnownBits SpecificShift = LHS;
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SpecificShift.Zero.lshrInPlace(ShiftAmt);
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SpecificShift.One.lshrInPlace(ShiftAmt);
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Known = KnownBits::commonBits(Known, SpecificShift);
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if (Known.isUnknown())
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break;
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}
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}
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Known.Zero.setHighBits(MinLeadingZeros);
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return Known;
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}
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KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS) {
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unsigned BitWidth = LHS.getBitWidth();
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KnownBits Known(BitWidth);
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if (RHS.isConstant() && RHS.getConstant().ult(BitWidth)) {
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unsigned Shift = RHS.getConstant().getZExtValue();
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Known = LHS;
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Known.Zero.ashrInPlace(Shift);
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Known.One.ashrInPlace(Shift);
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return Known;
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}
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// No matter the shift amount, the leading sign bits will stay.
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unsigned MinLeadingZeros = LHS.countMinLeadingZeros();
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unsigned MinLeadingOnes = LHS.countMinLeadingOnes();
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// Minimum shift amount high bits are known sign bits.
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APInt MinShiftAmount = RHS.getMinValue();
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if (MinShiftAmount.ult(BitWidth)) {
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if (MinLeadingZeros) {
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MinLeadingZeros += MinShiftAmount.getZExtValue();
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MinLeadingZeros = std::min(MinLeadingZeros, BitWidth);
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}
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if (MinLeadingOnes) {
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MinLeadingOnes += MinShiftAmount.getZExtValue();
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MinLeadingOnes = std::min(MinLeadingOnes, BitWidth);
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}
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}
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// If the maximum shift is in range, then find the common bits from all
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// possible shifts.
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APInt MaxShiftAmount = RHS.getMaxValue();
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if (MaxShiftAmount.ult(BitWidth) && !LHS.isUnknown()) {
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uint64_t ShiftAmtZeroMask = (~RHS.Zero).getZExtValue();
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uint64_t ShiftAmtOneMask = RHS.One.getZExtValue();
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assert(MinShiftAmount.ult(MaxShiftAmount) && "Illegal shift range");
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Known.Zero.setAllBits();
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Known.One.setAllBits();
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for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(),
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MaxShiftAmt = MaxShiftAmount.getZExtValue();
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ShiftAmt <= MaxShiftAmt; ++ShiftAmt) {
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// Skip if the shift amount is impossible.
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if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt ||
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(ShiftAmtOneMask | ShiftAmt) != ShiftAmt)
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continue;
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KnownBits SpecificShift = LHS;
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SpecificShift.Zero.ashrInPlace(ShiftAmt);
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SpecificShift.One.ashrInPlace(ShiftAmt);
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Known = KnownBits::commonBits(Known, SpecificShift);
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if (Known.isUnknown())
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break;
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}
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}
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Known.Zero.setHighBits(MinLeadingZeros);
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Known.One.setHighBits(MinLeadingOnes);
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return Known;
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}
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Optional<bool> KnownBits::eq(const KnownBits &LHS, const KnownBits &RHS) {
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if (LHS.isConstant() && RHS.isConstant())
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return Optional<bool>(LHS.getConstant() == RHS.getConstant());
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if (LHS.One.intersects(RHS.Zero) || RHS.One.intersects(LHS.Zero))
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return Optional<bool>(false);
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return None;
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}
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Optional<bool> KnownBits::ne(const KnownBits &LHS, const KnownBits &RHS) {
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if (Optional<bool> KnownEQ = eq(LHS, RHS))
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return Optional<bool>(!KnownEQ.getValue());
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return None;
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}
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Optional<bool> KnownBits::ugt(const KnownBits &LHS, const KnownBits &RHS) {
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// LHS >u RHS -> false if umax(LHS) <= umax(RHS)
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if (LHS.getMaxValue().ule(RHS.getMinValue()))
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return Optional<bool>(false);
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// LHS >u RHS -> true if umin(LHS) > umax(RHS)
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if (LHS.getMinValue().ugt(RHS.getMaxValue()))
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return Optional<bool>(true);
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return None;
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}
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Optional<bool> KnownBits::uge(const KnownBits &LHS, const KnownBits &RHS) {
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if (Optional<bool> IsUGT = ugt(RHS, LHS))
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return Optional<bool>(!IsUGT.getValue());
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return None;
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}
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Optional<bool> KnownBits::ult(const KnownBits &LHS, const KnownBits &RHS) {
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return ugt(RHS, LHS);
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}
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Optional<bool> KnownBits::ule(const KnownBits &LHS, const KnownBits &RHS) {
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return uge(RHS, LHS);
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}
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Optional<bool> KnownBits::sgt(const KnownBits &LHS, const KnownBits &RHS) {
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// LHS >s RHS -> false if smax(LHS) <= smax(RHS)
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if (LHS.getSignedMaxValue().sle(RHS.getSignedMinValue()))
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return Optional<bool>(false);
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// LHS >s RHS -> true if smin(LHS) > smax(RHS)
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if (LHS.getSignedMinValue().sgt(RHS.getSignedMaxValue()))
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return Optional<bool>(true);
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return None;
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}
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Optional<bool> KnownBits::sge(const KnownBits &LHS, const KnownBits &RHS) {
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if (Optional<bool> KnownSGT = sgt(RHS, LHS))
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return Optional<bool>(!KnownSGT.getValue());
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return None;
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}
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Optional<bool> KnownBits::slt(const KnownBits &LHS, const KnownBits &RHS) {
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return sgt(RHS, LHS);
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}
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Optional<bool> KnownBits::sle(const KnownBits &LHS, const KnownBits &RHS) {
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return sge(RHS, LHS);
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}
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KnownBits KnownBits::abs(bool IntMinIsPoison) const {
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// If the source's MSB is zero then we know the rest of the bits already.
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if (isNonNegative())
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return *this;
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// Absolute value preserves trailing zero count.
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KnownBits KnownAbs(getBitWidth());
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KnownAbs.Zero.setLowBits(countMinTrailingZeros());
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// We only know that the absolute values's MSB will be zero if INT_MIN is
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// poison, or there is a set bit that isn't the sign bit (otherwise it could
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// be INT_MIN).
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if (IntMinIsPoison || (!One.isNullValue() && !One.isMinSignedValue()))
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KnownAbs.Zero.setSignBit();
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// FIXME: Handle known negative input?
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// FIXME: Calculate the negated Known bits and combine them?
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return KnownAbs;
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}
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KnownBits KnownBits::mul(const KnownBits &LHS, const KnownBits &RHS) {
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unsigned BitWidth = LHS.getBitWidth();
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assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
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!RHS.hasConflict() && "Operand mismatch");
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// Compute a conservative estimate for high known-0 bits.
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unsigned LeadZ =
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std::max(LHS.countMinLeadingZeros() + RHS.countMinLeadingZeros(),
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BitWidth) -
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BitWidth;
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LeadZ = std::min(LeadZ, BitWidth);
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// The result of the bottom bits of an integer multiply can be
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// inferred by looking at the bottom bits of both operands and
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// multiplying them together.
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// We can infer at least the minimum number of known trailing bits
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// of both operands. Depending on number of trailing zeros, we can
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// infer more bits, because (a*b) <=> ((a/m) * (b/n)) * (m*n) assuming
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// a and b are divisible by m and n respectively.
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// We then calculate how many of those bits are inferrable and set
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// the output. For example, the i8 mul:
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// a = XXXX1100 (12)
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// b = XXXX1110 (14)
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// We know the bottom 3 bits are zero since the first can be divided by
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// 4 and the second by 2, thus having ((12/4) * (14/2)) * (2*4).
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// Applying the multiplication to the trimmed arguments gets:
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// XX11 (3)
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// X111 (7)
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// -------
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// XX11
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// XX11
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// XX11
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// XX11
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// -------
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// XXXXX01
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// Which allows us to infer the 2 LSBs. Since we're multiplying the result
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// by 8, the bottom 3 bits will be 0, so we can infer a total of 5 bits.
|
|
// The proof for this can be described as:
|
|
// Pre: (C1 >= 0) && (C1 < (1 << C5)) && (C2 >= 0) && (C2 < (1 << C6)) &&
|
|
// (C7 == (1 << (umin(countTrailingZeros(C1), C5) +
|
|
// umin(countTrailingZeros(C2), C6) +
|
|
// umin(C5 - umin(countTrailingZeros(C1), C5),
|
|
// C6 - umin(countTrailingZeros(C2), C6)))) - 1)
|
|
// %aa = shl i8 %a, C5
|
|
// %bb = shl i8 %b, C6
|
|
// %aaa = or i8 %aa, C1
|
|
// %bbb = or i8 %bb, C2
|
|
// %mul = mul i8 %aaa, %bbb
|
|
// %mask = and i8 %mul, C7
|
|
// =>
|
|
// %mask = i8 ((C1*C2)&C7)
|
|
// Where C5, C6 describe the known bits of %a, %b
|
|
// C1, C2 describe the known bottom bits of %a, %b.
|
|
// C7 describes the mask of the known bits of the result.
|
|
const APInt &Bottom0 = LHS.One;
|
|
const APInt &Bottom1 = RHS.One;
|
|
|
|
// How many times we'd be able to divide each argument by 2 (shr by 1).
|
|
// This gives us the number of trailing zeros on the multiplication result.
|
|
unsigned TrailBitsKnown0 = (LHS.Zero | LHS.One).countTrailingOnes();
|
|
unsigned TrailBitsKnown1 = (RHS.Zero | RHS.One).countTrailingOnes();
|
|
unsigned TrailZero0 = LHS.countMinTrailingZeros();
|
|
unsigned TrailZero1 = RHS.countMinTrailingZeros();
|
|
unsigned TrailZ = TrailZero0 + TrailZero1;
|
|
|
|
// Figure out the fewest known-bits operand.
|
|
unsigned SmallestOperand =
|
|
std::min(TrailBitsKnown0 - TrailZero0, TrailBitsKnown1 - TrailZero1);
|
|
unsigned ResultBitsKnown = std::min(SmallestOperand + TrailZ, BitWidth);
|
|
|
|
APInt BottomKnown =
|
|
Bottom0.getLoBits(TrailBitsKnown0) * Bottom1.getLoBits(TrailBitsKnown1);
|
|
|
|
KnownBits Res(BitWidth);
|
|
Res.Zero.setHighBits(LeadZ);
|
|
Res.Zero |= (~BottomKnown).getLoBits(ResultBitsKnown);
|
|
Res.One = BottomKnown.getLoBits(ResultBitsKnown);
|
|
return Res;
|
|
}
|
|
|
|
KnownBits KnownBits::mulhs(const KnownBits &LHS, const KnownBits &RHS) {
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
|
|
!RHS.hasConflict() && "Operand mismatch");
|
|
KnownBits WideLHS = LHS.sext(2 * BitWidth);
|
|
KnownBits WideRHS = RHS.sext(2 * BitWidth);
|
|
return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
|
|
}
|
|
|
|
KnownBits KnownBits::mulhu(const KnownBits &LHS, const KnownBits &RHS) {
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
|
|
!RHS.hasConflict() && "Operand mismatch");
|
|
KnownBits WideLHS = LHS.zext(2 * BitWidth);
|
|
KnownBits WideRHS = RHS.zext(2 * BitWidth);
|
|
return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
|
|
}
|
|
|
|
KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS) {
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
KnownBits Known(BitWidth);
|
|
|
|
// For the purposes of computing leading zeros we can conservatively
|
|
// treat a udiv as a logical right shift by the power of 2 known to
|
|
// be less than the denominator.
|
|
unsigned LeadZ = LHS.countMinLeadingZeros();
|
|
unsigned RHSMaxLeadingZeros = RHS.countMaxLeadingZeros();
|
|
|
|
if (RHSMaxLeadingZeros != BitWidth)
|
|
LeadZ = std::min(BitWidth, LeadZ + BitWidth - RHSMaxLeadingZeros - 1);
|
|
|
|
Known.Zero.setHighBits(LeadZ);
|
|
return Known;
|
|
}
|
|
|
|
KnownBits KnownBits::urem(const KnownBits &LHS, const KnownBits &RHS) {
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
KnownBits Known(BitWidth);
|
|
|
|
if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
|
|
// The upper bits are all zero, the lower ones are unchanged.
|
|
APInt LowBits = RHS.getConstant() - 1;
|
|
Known.Zero = LHS.Zero | ~LowBits;
|
|
Known.One = LHS.One & LowBits;
|
|
return Known;
|
|
}
|
|
|
|
// Since the result is less than or equal to either operand, any leading
|
|
// zero bits in either operand must also exist in the result.
|
|
uint32_t Leaders =
|
|
std::max(LHS.countMinLeadingZeros(), RHS.countMinLeadingZeros());
|
|
Known.Zero.setHighBits(Leaders);
|
|
return Known;
|
|
}
|
|
|
|
KnownBits KnownBits::srem(const KnownBits &LHS, const KnownBits &RHS) {
|
|
unsigned BitWidth = LHS.getBitWidth();
|
|
assert(!LHS.hasConflict() && !RHS.hasConflict());
|
|
KnownBits Known(BitWidth);
|
|
|
|
if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
|
|
// The low bits of the first operand are unchanged by the srem.
|
|
APInt LowBits = RHS.getConstant() - 1;
|
|
Known.Zero = LHS.Zero & LowBits;
|
|
Known.One = LHS.One & LowBits;
|
|
|
|
// If the first operand is non-negative or has all low bits zero, then
|
|
// the upper bits are all zero.
|
|
if (LHS.isNonNegative() || LowBits.isSubsetOf(LHS.Zero))
|
|
Known.Zero |= ~LowBits;
|
|
|
|
// If the first operand is negative and not all low bits are zero, then
|
|
// the upper bits are all one.
|
|
if (LHS.isNegative() && LowBits.intersects(LHS.One))
|
|
Known.One |= ~LowBits;
|
|
return Known;
|
|
}
|
|
|
|
// The sign bit is the LHS's sign bit, except when the result of the
|
|
// remainder is zero. The magnitude of the result should be less than or
|
|
// equal to the magnitude of the LHS. Therefore any leading zeros that exist
|
|
// in the left hand side must also exist in the result.
|
|
Known.Zero.setHighBits(LHS.countMinLeadingZeros());
|
|
return Known;
|
|
}
|
|
|
|
KnownBits &KnownBits::operator&=(const KnownBits &RHS) {
|
|
// Result bit is 0 if either operand bit is 0.
|
|
Zero |= RHS.Zero;
|
|
// Result bit is 1 if both operand bits are 1.
|
|
One &= RHS.One;
|
|
return *this;
|
|
}
|
|
|
|
KnownBits &KnownBits::operator|=(const KnownBits &RHS) {
|
|
// Result bit is 0 if both operand bits are 0.
|
|
Zero &= RHS.Zero;
|
|
// Result bit is 1 if either operand bit is 1.
|
|
One |= RHS.One;
|
|
return *this;
|
|
}
|
|
|
|
KnownBits &KnownBits::operator^=(const KnownBits &RHS) {
|
|
// Result bit is 0 if both operand bits are 0 or both are 1.
|
|
APInt Z = (Zero & RHS.Zero) | (One & RHS.One);
|
|
// Result bit is 1 if one operand bit is 0 and the other is 1.
|
|
One = (Zero & RHS.One) | (One & RHS.Zero);
|
|
Zero = std::move(Z);
|
|
return *this;
|
|
}
|
|
|
|
void KnownBits::print(raw_ostream &OS) const {
|
|
OS << "{Zero=" << Zero << ", One=" << One << "}";
|
|
}
|
|
void KnownBits::dump() const {
|
|
print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|