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59013b297c
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the
best that the A-form and D-form address predicates catch everything before
the code decides to emit a X-form address.
(b) Expand vector store test cases to include the usual suspects.
llvm-svn: 60034
92 lines
3.1 KiB
LLVM
92 lines
3.1 KiB
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep {stqd.*0(\$3)} %t1.s | count 4
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; RUN: grep {stqd.*16(\$3)} %t1.s | count 4
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; RUN: grep 16256 %t1.s | count 2
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; RUN: grep 16384 %t1.s | count 1
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; RUN: grep {shli.*, 4} %t1.s | count 4
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; RUN: grep stqx %t1.s | count 4
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; ModuleID = 'stores.bc'
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define void @store_v16i8_1(<16 x i8>* %a) nounwind {
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entry:
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store <16 x i8> < i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1, i8 1, i8 2, i8 1, i8 1 >, <16 x i8>* %a
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ret void
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}
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define void @store_v16i8_2(<16 x i8>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <16 x i8>* %a, i32 1
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store <16 x i8> < i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2 >, <16 x i8>* %arrayidx
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ret void
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}
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define void @store_v16i8_3(<16 x i8>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <16 x i8>* %a, i32 %i
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store <16 x i8> < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 >, <16 x i8>* %arrayidx
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ret void
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}
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define void @store_v8i16_1(<8 x i16>* %a) nounwind {
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entry:
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store <8 x i16> < i16 1, i16 2, i16 1, i16 1, i16 1, i16 2, i16 1, i16 1 >, <8 x i16>* %a
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ret void
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}
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define void @store_v8i16_2(<8 x i16>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <8 x i16>* %a, i16 1
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store <8 x i16> < i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2 >, <8 x i16>* %arrayidx
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ret void
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}
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define void @store_v8i16_3(<8 x i16>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <8 x i16>* %a, i32 %i
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store <8 x i16> < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 >, <8 x i16>* %arrayidx
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ret void
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}
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define void @store_v4i32_1(<4 x i32>* %a) nounwind {
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entry:
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store <4 x i32> < i32 1, i32 2, i32 1, i32 1 >, <4 x i32>* %a
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ret void
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}
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define void @store_v4i32_2(<4 x i32>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <4 x i32>* %a, i32 1
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store <4 x i32> < i32 2, i32 2, i32 2, i32 2 >, <4 x i32>* %arrayidx
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ret void
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}
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define void @store_v4i32_3(<4 x i32>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <4 x i32>* %a, i32 %i
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store <4 x i32> < i32 1, i32 1, i32 1, i32 1 >, <4 x i32>* %arrayidx
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ret void
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}
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define void @store_v4f32_1(<4 x float>* %a) nounwind {
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entry:
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store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %a
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ret void
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}
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define void @store_v4f32_2(<4 x float>* %a) nounwind {
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entry:
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%arrayidx = getelementptr <4 x float>* %a, i32 1
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store <4 x float> < float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00 >, <4 x float>* %arrayidx
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ret void
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}
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define void @store_v4f32_3(<4 x float>* %a, i32 %i) nounwind {
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entry:
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%arrayidx = getelementptr <4 x float>* %a, i32 %i
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store <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x float>* %arrayidx
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ret void
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}
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