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f2e33e8135
As a first step towards real little-endian code generation, this patch changes the PowerPC MC layer to actually generate little-endian object files. This involves passing the little-endian flag through the various layers, including down to createELFObjectWriter so we actually get basic little-endian ELF objects, emitting instructions in little-endian order, and handling fixups and relocations as appropriate for little-endian. The bulk of the patch is to update most test cases in test/MC/PowerPC to verify both big- and little-endian encodings. (The only test cases *not* updated are those that create actual big-endian ABI code, like the TLS tests.) Note that while the object files are now little-endian, the generated code itself is not yet updated, in particular, it still does not adhere to the ELFv2 ABI. llvm-svn: 204634
76 lines
2.4 KiB
C++
76 lines
2.4 KiB
C++
//===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides PowerPC specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PPCMCTARGETDESC_H
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#define PPCMCTARGETDESC_H
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class Target;
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class StringRef;
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class raw_ostream;
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extern Target ThePPC32Target;
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extern Target ThePPC64Target;
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extern Target ThePPC64LETarget;
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MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI,
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StringRef TT, StringRef CPU);
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/// createPPCELFObjectWriter - Construct an PPC ELF object writer.
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MCObjectWriter *createPPCELFObjectWriter(raw_ostream &OS,
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bool Is64Bit,
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bool IsLittleEndian,
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uint8_t OSABI);
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/// createPPCELFObjectWriter - Construct a PPC Mach-O object writer.
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MCObjectWriter *createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype);
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} // End llvm namespace
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// Generated files will use "namespace PPC". To avoid symbol clash,
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// undefine PPC here. PPC may be predefined on some hosts.
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#undef PPC
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// Defines symbolic names for PowerPC registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "PPCGenRegisterInfo.inc"
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// Defines symbolic names for the PowerPC instructions.
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//
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#define GET_INSTRINFO_ENUM
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#include "PPCGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "PPCGenSubtargetInfo.inc"
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#endif
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