Scott Linder f5a9498c8a [CodeGen] Fix assert in SelectionDAG::computeKnownBits ... Fix SelectionDAG::computeKnownBits asserting when handling EXTRACT_SUBVECTOR when zero extending the demanded elements mask if it is already as long as the source vector. Differential Revision: https://reviews.llvm.org/D49574 llvm-svn: 339600		2018-08-13 18:44:21 +00:00
..
AArch64	[SelectionDAG] try harder to convert funnel shift to rotate	2018-08-09 17:26:22 +00:00
AMDGPU	[CodeGen] Fix assert in SelectionDAG::computeKnownBits	2018-08-13 18:44:21 +00:00
ARC
ARM	[ARM] Added FP16 VREV Vector Instrinsic CodeGen support	2018-08-13 08:37:41 +00:00
AVR
BPF	bpf: add missing RegState to notify MachineInstr verifier necessary register usage	2018-07-27 16:58:52 +00:00
Generic	[DWARF] Unclamp line table version on Darwin for v5 and later.	2018-08-08 21:16:50 +00:00
Hexagon	[Hexagon] Map ISD::TRAP to J2_trap0(#0)	2018-08-09 18:03:45 +00:00
Inputs
Lanai
Mips	[mips] Handle branch expansion corner cases	2018-08-07 10:45:45 +00:00
MIR
MSP430
Nios2
NVPTX	DAG: Check no-signed-zeros instead of unsafe-fp-math	2018-08-12 19:09:12 +00:00
PowerPC	[SelectionDAG] try harder to convert funnel shift to rotate	2018-08-09 17:26:22 +00:00
RISCV	[RISCV] Fixed test case failure due to r338047	2018-07-31 00:36:28 +00:00
SPARC	Revert "[Sparc] Add support for the cycle counter available in GR740"	2018-08-13 14:18:09 +00:00
SystemZ	[SystemZ] Improve handling of instructions which expand to several groups	2018-08-03 10:43:05 +00:00
Thumb	[ARM] Adjust AND immediates to make them cheaper to select.	2018-08-10 21:21:53 +00:00
Thumb2
WebAssembly	[WebAssembly] Added default stack-only instruction mode for MC.	2018-08-10 21:32:47 +00:00
WinCFGuard	Rename the cfguard module flag to cfguardtable	2018-08-10 09:48:53 +00:00
WinEH
X86	[X86] Add tests showing missing div/rem 0, X -> 0 combines	2018-08-13 13:29:54 +00:00
XCore	[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)	2018-07-15 16:27:07 +00:00