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8d48a252a1
The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. llvm-svn: 250697
11 lines
325 B
LLVM
11 lines
325 B
LLVM
; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
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; immediate argument > upper-bound
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; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
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define i32 @usat1() nounwind {
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%tmp = call i32 @llvm.arm.usat(i32 128, i32 32)
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ret i32 %tmp
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}
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declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
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