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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
52 lines
1.5 KiB
TableGen
52 lines
1.5 KiB
TableGen
//===-- BPFRegisterInfo.td - BPF Register defs -------------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Declarations that describe the BPF register file
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//===----------------------------------------------------------------------===//
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let Namespace = "BPF" in {
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def sub_32 : SubRegIndex<32>;
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}
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class Wi<bits<16> Enc, string n> : Register<n> {
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let HWEncoding = Enc;
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let Namespace = "BPF";
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}
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// Registers are identified with 4-bit ID numbers.
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// Ri - 64-bit integer registers
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class Ri<bits<16> Enc, string n, list<Register> subregs>
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: RegisterWithSubRegs<n, subregs> {
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let HWEncoding = Enc;
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let Namespace = "BPF";
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let SubRegIndices = [sub_32];
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}
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foreach I = 0-11 in {
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// 32-bit Integer (alias to low part of 64-bit register).
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def W#I : Wi<I, "w"#I>, DwarfRegNum<[I]>;
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// 64-bit Integer registers
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def R#I : Ri<I, "r"#I, [!cast<Wi>("W"#I)]>, DwarfRegNum<[I]>;
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}
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// Register classes.
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def GPR32 : RegisterClass<"BPF", [i32], 32, (add
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(sequence "W%u", 1, 9),
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W0, // Return value
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W11, // Stack Ptr
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W10 // Frame Ptr
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)>;
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def GPR : RegisterClass<"BPF", [i64], 64, (add
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(sequence "R%u", 1, 9),
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R0, // Return value
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R11, // Stack Ptr
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R10 // Frame Ptr
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)>;
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