1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen/AArch64/fastcc-reserved.ll
Tim Northover ca0f4dc4f0 AArch64/ARM64: move ARM64 into AArch64's place
This commit starts with a "git mv ARM64 AArch64" and continues out
from there, renaming the C++ classes, intrinsics, and other
target-local objects for consistency.

"ARM64" test directories are also moved, and tests that began their
life in ARM64 use an arm64 triple, those from AArch64 use an aarch64
triple. Both should be equivalent though.

This finishes the AArch64 merge, and everyone should feel free to
continue committing as normal now.

llvm-svn: 209577
2014-05-24 12:50:23 +00:00

59 lines
1.4 KiB
LLVM

; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s
; This test is designed to be run in the situation where the
; call-frame is not reserved (hence disable-fp-elim), but where
; callee-pop can occur (hence tailcallopt).
declare fastcc void @will_pop([8 x i32], i32 %val)
define fastcc void @foo(i32 %in) {
; CHECK-LABEL: foo:
%addr = alloca i8, i32 %in
; Normal frame setup stuff:
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: mov x29, sp
; Reserve space for call-frame:
; CHECK: sub sp, sp, #16
call fastcc void @will_pop([8 x i32] undef, i32 42)
; CHECK: bl will_pop
; Since @will_pop is fastcc with tailcallopt, it will put the stack
; back where it needs to be, we shouldn't duplicate that
; CHECK-NOT: sub sp, sp, #16
; CHECK-NOT: add sp, sp,
; CHECK: mov sp, x29
; CHECK: ldp x29, x30, [sp], #16
ret void
}
declare void @wont_pop([8 x i32], i32 %val)
define void @foo1(i32 %in) {
; CHECK-LABEL: foo1:
%addr = alloca i8, i32 %in
; Normal frame setup again
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: mov x29, sp
; Reserve space for call-frame
; CHECK: sub sp, sp, #16
call void @wont_pop([8 x i32] undef, i32 42)
; CHECK: bl wont_pop
; This time we *do* need to unreserve the call-frame
; CHECK: add sp, sp, #16
; Check for epilogue (primarily to make sure sp spotted above wasn't
; part of it).
; CHECK: mov sp, x29
; CHECK: ldp x29, x30, [sp], #16
ret void
}