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llvm-mirror/utils/TableGen
Alexandros Lamprineas a50e569197 [AArch64] Add a Machine Value Type for 8 consecutive registers
Adds MVT::i64x8, a Machine Value Type needed for lowering inline assembly
operands which materialize a sequence of eight general purpose registers.

Differential Revision: https://reviews.llvm.org/D94096
2021-08-02 15:45:58 +01:00
..
GlobalISel
AsmMatcherEmitter.cpp [TableGen] Allow identical MnemonicAliases with no predicate 2021-06-30 10:53:39 +01:00
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h [TableGen] Fix printing second PC-relative operand 2021-06-23 13:27:37 +07:00
Attributes.cpp [Attributes] Determine attribute properties from TableGen data 2021-07-12 22:13:38 +02:00
CallingConvEmitter.cpp
CMakeLists.txt
CodeBeadsGen.cpp
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Convert TableGen assert to error 2021-06-01 13:17:58 -07:00
CodeGenDAGPatterns.h
CodeGenHwModes.cpp
CodeGenHwModes.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp [TableGen] Allow isAllocatable inheritence from any superclass 2021-07-16 13:02:24 +09:00
CodeGenRegisters.h
CodeGenSchedule.cpp
CodeGenSchedule.h
CodeGenTarget.cpp [AArch64] Add a Machine Value Type for 8 consecutive registers 2021-08-02 15:45:58 +01:00
CodeGenTarget.h
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAEmitter.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
DFAEmitter.h
DFAPacketizerEmitter.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
DirectiveEmitter.cpp
DisassemblerEmitter.cpp
ExegesisEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
GICombinerEmitter.cpp
GlobalISelEmitter.cpp Reland [GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize. 2021-06-28 15:24:27 +01:00
InfoByHwMode.cpp
InfoByHwMode.h
InstrDocsEmitter.cpp
InstrInfoEmitter.cpp
IntrinsicEmitter.cpp
OptEmitter.cpp
OptEmitter.h
OptParserEmitter.cpp PR51018: A few more explicit conversions from SmallString to StringRef 2021-07-09 13:54:02 -07:00
OptRSTEmitter.cpp
PredicateExpander.cpp
PredicateExpander.h
PseudoLoweringEmitter.cpp
RegisterBankEmitter.cpp
RegisterInfoEmitter.cpp
RISCVCompressInstEmitter.cpp
SDNodeProperties.cpp
SDNodeProperties.h
SearchableTableEmitter.cpp
SequenceToOffsetTable.h
SubtargetEmitter.cpp
SubtargetFeatureInfo.cpp
SubtargetFeatureInfo.h
TableGen.cpp
TableGenBackends.h
tdtags
Types.cpp
Types.h
WebAssemblyDisassemblerEmitter.cpp
WebAssemblyDisassemblerEmitter.h
X86DisassemblerShared.h
X86DisassemblerTables.cpp [X86] Fix handling of maskmovdqu in X32 2021-07-15 22:56:08 +01:00
X86DisassemblerTables.h
X86EVEX2VEXTablesEmitter.cpp
X86FoldTablesEmitter.cpp
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp [X86] Fix handling of maskmovdqu in X32 2021-07-15 22:56:08 +01:00
X86RecognizableInstr.h