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0ecce5d4da
Summary: [VPlan] Implement vector code generation support for simple outer loops. Context: Patch Series #1 for outer loop vectorization support in LV using VPlan. (RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). This patch introduces vector code generation support for simple outer loops that are currently supported in the VPlanNativePath. Changes here essentially do the following: - force vector code generation using explicit vectorize_width - add conservative early returns in cost model and other places for VPlanNativePath - add code for setting up outer loop inductions - support for widening non-induction PHIs that can result from inner loops and uniform conditional branches - support for generating uniform inner branches We plan to add a handful C outer loop executable tests once the initial code generation support is committed. This patch is expected to be NFC for the inner loop vectorizer path. Since we are moving in the direction of supporting outer loop vectorization in LV, it may also be time to rename classes such as InnerLoopVectorizer. Reviewers: fhahn, rengolin, hsaito, dcaballe, mkuper, hfinkel, Ayal Reviewed By: fhahn, hsaito Subscribers: dmgreen, bollu, tschuett, rkruppe, rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D50820 llvm-svn: 342197
83 lines
3.8 KiB
LLVM
83 lines
3.8 KiB
LLVM
; extern int arr[8][8];
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; extern int arr2[8];
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;
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; void foo(int n)
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; {
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; int i1, i2;
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;
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; #pragma clang loop vectorize(enable) vectorize_width(4)
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; for (i1 = 0; i1 < 8; i1++) {
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; arr2[i1] = i1;
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; for (i2 = 0; i2 < 8; i2++)
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; arr[i2][i1] = i1 + n;
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; }
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; }
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;
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; RUN: opt -S -loop-vectorize -enable-vplan-native-path < %s | FileCheck %s
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; CHECK-LABEL: vector.ph:
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; CHECK: %[[SplatVal:.*]] = insertelement <4 x i32> undef, i32 %n, i32 0
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; CHECK: %[[Splat:.*]] = shufflevector <4 x i32> %[[SplatVal]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK-LABEL: vector.body:
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; CHECK: %[[Ind:.*]] = phi i64 [ 0, %vector.ph ], [ %[[IndNext:.*]], %[[ForInc:.*]] ]
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; CHECK: %[[VecInd:.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %vector.ph ], [ %[[VecIndNext:.*]], %[[ForInc]] ]
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; CHECK: %[[AAddr:.*]] = getelementptr inbounds [8 x i32], [8 x i32]* @arr2, i64 0, <4 x i64> %[[VecInd]]
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; CHECK: %[[VecIndTr:.*]] = trunc <4 x i64> %[[VecInd]] to <4 x i32>
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; CHECK: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> %[[VecIndTr]], <4 x i32*> %[[AAddr]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)
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; CHECK: %[[VecIndTr2:.*]] = trunc <4 x i64> %[[VecInd]] to <4 x i32>
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; CHECK: %[[StoreVal:.*]] = add nsw <4 x i32> %[[VecIndTr2]], %[[Splat]]
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; CHECK: br label %[[InnerLoop:.+]]
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; CHECK: [[InnerLoop]]:
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; CHECK: %[[InnerPhi:.*]] = phi <4 x i64> [ %[[InnerPhiNext:.*]], %[[InnerLoop]] ], [ zeroinitializer, %vector.body ]
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; CHECK: %[[AAddr2:.*]] = getelementptr inbounds [8 x [8 x i32]], [8 x [8 x i32]]* @arr, i64 0, <4 x i64> %[[InnerPhi]], <4 x i64> %[[VecInd]]
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; CHECK: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> %[[StoreVal]], <4 x i32*> %[[AAddr2]], i32 4, <4 x i1> <i1 true, i1 true, i1 true
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; CHECK: %[[InnerPhiNext]] = add nuw nsw <4 x i64> %[[InnerPhi]], <i64 1, i64 1, i64 1, i64 1>
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; CHECK: %[[VecCond:.*]] = icmp eq <4 x i64> %[[InnerPhiNext]], <i64 8, i64 8, i64 8, i64 8>
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; CHECK: %[[InnerCond:.*]] = extractelement <4 x i1> %[[VecCond]], i32 0
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; CHECK: br i1 %[[InnerCond]], label %[[ForInc]], label %[[InnerLoop]]
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; CHECK: [[ForInc]]:
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; CHECK: %[[IndNext]] = add i64 %[[Ind]], 4
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; CHECK: %[[VecIndNext]] = add <4 x i64> %[[VecInd]], <i64 4, i64 4, i64 4, i64 4>
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; CHECK: %[[Cmp:.*]] = icmp eq i64 %[[IndNext]], 8
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; CHECK: br i1 %[[Cmp]], label %middle.block, label %vector.body
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@arr2 = external global [8 x i32], align 16
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@arr = external global [8 x [8 x i32]], align 16
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; Function Attrs: norecurse nounwind uwtable
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define void @foo(i32 %n) {
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entry:
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br label %for.body
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for.body: ; preds = %for.inc8, %entry
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%indvars.iv21 = phi i64 [ 0, %entry ], [ %indvars.iv.next22, %for.inc8 ]
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%arrayidx = getelementptr inbounds [8 x i32], [8 x i32]* @arr2, i64 0, i64 %indvars.iv21
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%0 = trunc i64 %indvars.iv21 to i32
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store i32 %0, i32* %arrayidx, align 4
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%1 = trunc i64 %indvars.iv21 to i32
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%add = add nsw i32 %1, %n
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br label %for.body3
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for.body3: ; preds = %for.body3, %for.body
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%indvars.iv = phi i64 [ 0, %for.body ], [ %indvars.iv.next, %for.body3 ]
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%arrayidx7 = getelementptr inbounds [8 x [8 x i32]], [8 x [8 x i32]]* @arr, i64 0, i64 %indvars.iv, i64 %indvars.iv21
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store i32 %add, i32* %arrayidx7, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 8
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br i1 %exitcond, label %for.inc8, label %for.body3
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for.inc8: ; preds = %for.body3
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%indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
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%exitcond23 = icmp eq i64 %indvars.iv.next22, 8
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br i1 %exitcond23, label %for.end10, label %for.body, !llvm.loop !1
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for.end10: ; preds = %for.inc8
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 4}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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