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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
81 lines
1.8 KiB
LLVM
81 lines
1.8 KiB
LLVM
; Ensure that indirect calls work and that they are lowered to some
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; sort of branch and link instruction.
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;
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; RUN: llc < %s -march=mblaze -mattr=+mul,+fpu,+barrel | FileCheck %s
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declare i32 @printf(i8*, ...)
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@MSG = internal constant [13 x i8] c"Message: %d\0A\00"
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@FUNS = private constant [5 x i32 (i32,i32)*]
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[ i32 (i32,i32)* @doadd,
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i32 (i32,i32)* @dosub,
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i32 (i32,i32)* @domul,
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i32 (i32,i32)* @dodiv,
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i32 (i32,i32)* @dorem ]
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define i32 @doadd(i32 %a, i32 %b)
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{
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; CHECK: doadd:
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%tmp.0 = add i32 %a, %b
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ret i32 %tmp.0
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; CHECK: rtsd
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}
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define i32 @dosub(i32 %a, i32 %b)
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{
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; CHECK: dosub:
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%tmp.0 = sub i32 %a, %b
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ret i32 %tmp.0
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; CHECK: rtsd
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}
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define i32 @domul(i32 %a, i32 %b)
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{
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; CHECK: domul:
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%tmp.0 = mul i32 %a, %b
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ret i32 %tmp.0
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; CHECK: rtsd
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}
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define i32 @dodiv(i32 %a, i32 %b)
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{
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; CHECK: dodiv:
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%tmp.0 = sdiv i32 %a, %b
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ret i32 %tmp.0
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; CHECK: rtsd
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}
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define i32 @dorem(i32 %a, i32 %b)
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{
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; CHECK: dorem:
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%tmp.0 = srem i32 %a, %b
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ret i32 %tmp.0
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; CHECK: rtsd
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}
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define i32 @callind(i32 %a, i32 %b)
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{
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; CHECK: callind:
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entry:
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br label %loop
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loop:
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%tmp.0 = phi i32 [ 0, %entry ], [ %tmp.3, %loop ]
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%dst.0 = getelementptr [5 x i32 (i32,i32)*]* @FUNS, i32 0, i32 %tmp.0
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%dst.1 = load i32 (i32,i32)** %dst.0
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%tmp.1 = call i32 %dst.1(i32 %a, i32 %b)
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; CHECK-NOT: brli
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; CHECK-NOT: brlai
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; CHECK: brl
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call i32 (i8*,...)* @printf( i8* getelementptr([13 x i8]* @MSG,i32 0,i32 0),
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i32 %tmp.1)
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; CHECK: brl
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%tmp.2 = add i32 %tmp.0, 1
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%tmp.3 = urem i32 %tmp.2, 5
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br label %loop
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; CHECK: br
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}
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