1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
llvm-mirror/test/CodeGen/MSP430/Inst16ri.ll
Anton Korobeynikov 172b91c273 Add reg-imm tests
llvm-svn: 84705
2009-10-21 00:11:44 +00:00

38 lines
681 B
LLVM

; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
define i16 @mov() nounwind {
; CHECK: mov:
; CHECK: mov.w #1, r15
ret i16 1
}
define i16 @add(i16 %a, i16 %b) nounwind {
; CHECK: add:
; CHECK: add.w #1, r15
%1 = add i16 %a, 1
ret i16 %1
}
define i16 @and(i16 %a, i16 %b) nounwind {
; CHECK: and:
; CHECK: and.w #1, r15
%1 = and i16 %a, 1
ret i16 %1
}
define i16 @bis(i16 %a, i16 %b) nounwind {
; CHECK: bis:
; CHECK: bis.w #1, r15
%1 = or i16 %a, 1
ret i16 %1
}
define i16 @xor(i16 %a, i16 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w #1, r15
%1 = xor i16 %a, 1
ret i16 %1
}