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13 lines
381 B
LLVM
13 lines
381 B
LLVM
; RUN: llc -mtriple=thumbv6-apple-ios -mcpu=cortex-m0 < %s | FileCheck %s
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; Cortex-M0 doesn't have 32-bit Thumb2 instructions (except for dmb, mrs, etc.)
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; rdar://11331541
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define i32 @t(i32 %a) nounwind {
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; CHECK: t:
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; CHECK: asrs [[REG1:(r[0-9]+)]], [[REG2:(r[0-9]+)]], #31
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; CHECK: eors [[REG1]], [[REG2]]
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%tmp0 = ashr i32 %a, 31
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%tmp1 = xor i32 %tmp0, %a
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ret i32 %tmp1
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}
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