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ad5400fa72
for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. llvm-svn: 133337
40 lines
975 B
LLVM
40 lines
975 B
LLVM
; RUN: llc -mtriple=i386-apple-darwin -mcpu=yonah < %s | FileCheck %s
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declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
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define fastcc void @t1() nounwind {
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entry:
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; CHECK: t1:
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; CHECK: calll _memset
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call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false)
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unreachable
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}
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define fastcc void @t2(i8 signext %c) nounwind {
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entry:
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; CHECK: t2:
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; CHECK: calll _memset
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call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false)
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unreachable
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
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define void @t3(i8* nocapture %s, i8 %a) nounwind {
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entry:
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tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false)
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ret void
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; CHECK: t3:
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; CHECK: imull $16843009
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}
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define void @t4(i8* nocapture %s, i8 %a) nounwind {
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entry:
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tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false)
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ret void
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; CHECK: t4:
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; CHECK: imull $16843009
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; CHECK-NOT: imul
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; CHECK: ret
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}
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