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llvm-mirror/test/CodeGen/X86/tailcall-largecode.ll
Jakob Stoklund Olesen 795083115c Ensure CopyToReg nodes are always glued to the call instruction.
The CopyToReg nodes that set up the argument registers before a call
must be glued to the call instruction. Otherwise, the scheduler may emit
the physreg copies long before the call, causing long live ranges for
the fixed registers.

Besides disabling good register allocation, that can also expose
problems when EmitInstrWithCustomInserter() splits a basic block during
the live range of a physreg.

llvm-svn: 159721
2012-07-04 19:28:31 +00:00

72 lines
2.7 KiB
LLVM

; RUN: llc < %s -mtriple=x86_64-linux-gnu -tailcallopt -code-model=large | FileCheck %s
declare fastcc i32 @callee(i32 %arg)
define fastcc i32 @directcall(i32 %arg) {
entry:
; This is the large code model, so &callee may not fit into the jmp
; instruction. Instead, stick it into a register.
; CHECK: movabsq $callee, [[REGISTER:%r[a-z0-9]+]]
; CHECK: jmpq *[[REGISTER]] # TAILCALL
%res = tail call fastcc i32 @callee(i32 %arg)
ret i32 %res
}
; Check that the register used for an indirect tail call doesn't
; clobber any of the arguments.
define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) {
; Adjust the stack to enter the function. (The amount of the
; adjustment may change in the future, in which case the location of
; the stack argument and the return adjustment will change too.)
; CHECK: pushq
; Put the call target into R11, which won't be clobbered while restoring
; callee-saved registers and won't be used for passing arguments.
; CHECK: movq %rdi, %rax
; Pass the stack argument.
; CHECK: movl $7, 16(%rsp)
; Pass the register arguments, in the right registers.
; CHECK: movl $1, %edi
; CHECK: movl $2, %esi
; CHECK: movl $3, %edx
; CHECK: movl $4, %ecx
; CHECK: movl $5, %r8d
; CHECK: movl $6, %r9d
; Adjust the stack to "return".
; CHECK: popq
; And tail-call to the target.
; CHECK: jmpq *%rax # TAILCALL
%res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5,
i32 6, i32 7)
ret i32 %res
}
; Check that the register used for a direct tail call doesn't clobber
; any of the arguments.
declare fastcc i32 @manyargs_callee(i32,i32,i32,i32,i32,i32,i32)
define fastcc i32 @direct_manyargs() {
; Adjust the stack to enter the function. (The amount of the
; adjustment may change in the future, in which case the location of
; the stack argument and the return adjustment will change too.)
; CHECK: pushq
; Pass the stack argument.
; CHECK: movl $7, 16(%rsp)
; This is the large code model, so &manyargs_callee may not fit into
; the jmp instruction. Put it into a register which won't be clobbered
; while restoring callee-saved registers and won't be used for passing
; arguments.
; CHECK: movabsq $manyargs_callee, %rax
; Pass the register arguments, in the right registers.
; CHECK: movl $1, %edi
; CHECK: movl $2, %esi
; CHECK: movl $3, %edx
; CHECK: movl $4, %ecx
; CHECK: movl $5, %r8d
; CHECK: movl $6, %r9d
; Adjust the stack to "return".
; CHECK: popq
; And tail-call to the target.
; CHECK: jmpq *%rax # TAILCALL
%res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4,
i32 5, i32 6, i32 7)
ret i32 %res
}