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llvm-mirror/test/MC/Disassembler/AArch64/arm64-system.txt
Tim Northover ca0f4dc4f0 AArch64/ARM64: move ARM64 into AArch64's place
This commit starts with a "git mv ARM64 AArch64" and continues out
from there, renaming the C++ classes, intrinsics, and other
target-local objects for consistency.

"ARM64" test directories are also moved, and tests that began their
life in ARM64 use an arm64 triple, those from AArch64 use an aarch64
triple. Both should be equivalent though.

This finishes the AArch64 merge, and everyone should feel free to
continue committing as normal now.

llvm-svn: 209577
2014-05-24 12:50:23 +00:00

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1.5 KiB
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# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
#-----------------------------------------------------------------------------
# Hint encodings
#-----------------------------------------------------------------------------
0x1f 0x20 0x03 0xd5
# CHECK: nop
0x9f 0x20 0x03 0xd5
# CHECK: sev
0xbf 0x20 0x03 0xd5
# CHECK: sevl
0x5f 0x20 0x03 0xd5
# CHECK: wfe
0x7f 0x20 0x03 0xd5
# CHECK: wfi
0x3f 0x20 0x03 0xd5
# CHECK: yield
#-----------------------------------------------------------------------------
# Single-immediate operand instructions
#-----------------------------------------------------------------------------
0x5f 0x3a 0x03 0xd5
# CHECK: clrex #10
0xdf 0x3f 0x03 0xd5
# CHECK: isb{{$}}
0xdf 0x31 0x03 0xd5
# CHECK: isb #1
0xbf 0x33 0x03 0xd5
# CHECK: dmb osh
0x9f 0x37 0x03 0xd5
# CHECK: dsb nsh
0x3f 0x76 0x08 0xd5
# CHECK: dc ivac
#-----------------------------------------------------------------------------
# Generic system instructions
#-----------------------------------------------------------------------------
0xff 0x05 0x0a 0xd5
0xe7 0x6a 0x0f 0xd5
0xf4 0x3f 0x2e 0xd5
0xbf 0x40 0x00 0xd5
0x00 0xb0 0x18 0xd5
0x00 0xb0 0x38 0xd5
# CHECK: sys #2, c0, c5, #7
# CHECK: sys #7, c6, c10, #7, x7
# CHECK: sysl x20, #6, c3, c15, #7
# CHECK: msr SPSEL, #0
# CHECK: msr S3_0_C11_C0_0, x0
# CHECK: mrs x0, S3_0_C11_C0_0
0x40 0xc0 0x1e 0xd5
0x40 0xc0 0x1c 0xd5
0x40 0xc0 0x18 0xd5
# CHECK: msr RMR_EL3, x0
# CHECK: msr RMR_EL2, x0
# CHECK: msr RMR_EL1, x0