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AsmParser
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AMDGPU: Fix return after else
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2016-11-15 19:58:54 +00:00 |
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Disassembler
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AMDGPU: Replace assert(false) with unreachable
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2016-11-15 19:34:37 +00:00 |
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InstPrinter
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AMDGPU: Fix formatting of 1/2pi immediate
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2016-11-15 00:04:33 +00:00 |
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MCTargetDesc
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
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2016-11-19 13:05:44 +00:00 |
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TargetInfo
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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Utils
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AMDGPU/SI: Handle hazard with > 8 byte VMEM stores
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2016-10-27 23:05:31 +00:00 |
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AMDGPU.h
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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AMDGPU.td
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Emit runtime metadata as a note element in .note section
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2016-11-10 21:18:49 +00:00 |
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AMDGPUAsmPrinter.h
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AMDGPU: Emit runtime metadata as a note element in .note section
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2016-11-10 21:18:49 +00:00 |
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AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCallLowering.h
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
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2016-10-07 14:39:53 +00:00 |
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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MachineScheduler: Export function to construct "default" scheduler.
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2016-11-28 20:11:54 +00:00 |
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AMDGPUInstrInfo.h
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MachineScheduler: Export function to construct "default" scheduler.
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2016-11-28 20:11:54 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPUInstructions.td
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies
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2016-11-28 18:58:49 +00:00 |
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AMDGPUISelLowering.h
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[DAG Combiner] Fix the native computation of the Newton series for reciprocals
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2016-11-10 23:31:06 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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[AMDGPU] Add wave barrier builtin
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2016-11-15 19:00:15 +00:00 |
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AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPromoteAlloca.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPTNote.h
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AMDGPU: Emit runtime metadata as a note element in .note section
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2016-11-10 21:18:49 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPURuntimeMetadata.h
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AMDGPU: Attempt to fix build failure on x86-64 selfhost build
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2016-11-11 02:48:50 +00:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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AMDGPUTargetMachine.cpp
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MachineScheduler: Export function to construct "default" scheduler.
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2016-11-28 20:11:54 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
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AMDGPUTargetObjectFile.h
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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Add new target hooks for LoadStoreVectorizer
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2016-10-03 10:31:34 +00:00 |
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AMDGPUTargetTransformInfo.h
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Do a sweep over move ctors and remove those that are identical to the default.
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2016-10-20 12:20:28 +00:00 |
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AMDILCFGStructurizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDKernelCodeT.h
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BUFInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
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CaymanInstructions.td
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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DSInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
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EvergreenInstructions.td
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FLATInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU/GCN: Exit early in hazard recognizer if there is no vreg argument
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2016-11-15 23:55:15 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU/SI: Handle hazard with s_rfe_b64
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2016-10-27 23:50:21 +00:00 |
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GCNSchedStrategy.cpp
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AMDGPU: Whitespace fixes
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2016-11-01 00:55:14 +00:00 |
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GCNSchedStrategy.h
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LLVMBuild.txt
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MIMGInstructions.td
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[AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>
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2016-11-15 13:39:07 +00:00 |
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Processors.td
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AMDGPU: Refactor processor definition to use ISA version features
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2016-10-26 16:37:56 +00:00 |
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R600ClauseMergePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ControlFlowFinalizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600ExpandSpecialInstrs.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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R600Instructions.td
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Target: Remove unused patterns and transforms. NFC.
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2016-10-07 00:30:49 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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AMDGPU: Refactor kernel argument lowering
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2016-09-16 21:53:00 +00:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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R600Packetizer.cpp
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Fix spelling mistakes in AMDGPU target comments. NFC.
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2016-11-18 11:04:02 +00:00 |
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDebuggerInsertNops.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIDefines.h
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AMDGPU: Workaround for instruction size with literals
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2016-11-01 20:42:24 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIFixSGPRCopies.cpp
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AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defined in scalar branches
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2016-11-29 00:46:46 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Cleanup immediate folding code
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2016-11-23 21:51:07 +00:00 |
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SIFrameLowering.cpp
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AMDGPU: Fix using incorrect private resource with no allocation
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2016-10-28 19:43:31 +00:00 |
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SIFrameLowering.h
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SIInsertSkips.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIInsertWaits.cpp
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SIInstrFormats.td
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[AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>
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2016-11-15 13:39:07 +00:00 |
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SIInstrInfo.cpp
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SIInstrInfo.h
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AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPRCopies pass
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2016-11-16 18:42:17 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Change frexp.exp intrinsic to return i16 for f16 input
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2016-11-18 22:31:08 +00:00 |
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SIInstructions.td
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AMDGPU/SI: Use float as the operand type for amdgcn.interp intrinsics
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2016-11-26 02:26:04 +00:00 |
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SIIntrinsics.td
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AMDGPU: Allow some control flow intrinsics to be CSEd
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2016-09-16 22:11:18 +00:00 |
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SIISelLowering.cpp
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AMDGPU/SI: Use float as the operand type for amdgcn.interp intrinsics
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2016-11-26 02:26:04 +00:00 |
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SIISelLowering.h
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[AMDGPU] Custom lower f16 = fp_round f64
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2016-11-17 04:28:37 +00:00 |
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SILoadStoreOptimizer.cpp
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[AMDGPU][CodeGen] To improve CGEMM performance: combine LDS reads.
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2016-11-03 14:37:13 +00:00 |
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SILowerControlFlow.cpp
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[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies
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2016-11-28 18:58:49 +00:00 |
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SILowerI1Copies.cpp
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[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies
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2016-11-28 18:58:49 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
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2016-09-16 21:34:26 +00:00 |
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SIMachineFunctionInfo.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
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SIMachineScheduler.cpp
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Fix spelling mistakes in AMDGPU target comments. NFC.
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2016-11-18 11:04:02 +00:00 |
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SIMachineScheduler.h
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SIOptimizeExecMasking.cpp
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AMDGPU: Fix use-after-free in SIOptimizeExecMasking
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2016-10-07 08:40:14 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SIRegisterInfo.h
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SIRegisterInfo.td
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SISchedule.td
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SIShrinkInstructions.cpp
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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SITypeRewriter.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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SIWholeQuadMode.cpp
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AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
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2016-11-25 17:37:09 +00:00 |
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SMInstructions.td
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[AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.
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2016-10-31 16:07:39 +00:00 |
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SOPInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
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VIInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
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VOP1Instructions.td
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
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2016-11-19 13:05:44 +00:00 |
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VOP2Instructions.td
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AMDGPU/SI: Remove zero_extend patterns for i16 ops selected to 32-bit insts
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2016-11-18 13:53:34 +00:00 |
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VOP3Instructions.td
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[AMDGPU] Handle f16 select{_cc}
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2016-11-16 03:16:26 +00:00 |
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VOPCInstructions.td
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
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VOPInstructions.td
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Fix spelling mistakes in AMDGPU target comments. NFC.
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2016-11-18 11:04:02 +00:00 |
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