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Based on the discussion in http://lists.llvm.org/pipermail/llvm-dev/2019-October/135574.html, the conclusion was reached that the ARM backend should produce vcmp instead of vcmpe instructions by default, i.e. not be producing an Invalid Operation exception when either arguments in a floating point compare are quiet NaNs. In the future, after constrained floating point intrinsics for floating point compare have been introduced, vcmpe instructions probably should be produced for those intrinsics - depending on the exact semantics they'll be defined to have. This patch logically consists of the following parts: - Revert http://llvm.org/viewvc/llvm-project?rev=294945&view=rev and http://llvm.org/viewvc/llvm-project?rev=294968&view=rev, which implemented fine-tuning for when to produce vcmpe (i.e. not do it for equality comparisons). The complexity introduced by those patches isn't needed anymore if we just always produce vcmp instead. Maybe these patches need to be reintroduced again once support is needed to map potential LLVM-IR constrained floating point compare intrinsics to the ARM instruction set. - Simply select vcmp, instead of vcmpe, see simple changes in lib/Target/ARM/ARMInstrVFP.td - Adapt lots of tests that tested for vcmpe (instead of vcmp). For all of these test, the intent of what is tested for isn't related to whether the vcmp should produce an Invalid Operation exception or not. Fixes PR43374. Differential Revision: https://reviews.llvm.org/D68463 llvm-svn: 374025
157 lines
4.4 KiB
LLVM
157 lines
4.4 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 -disable-post-ra | FileCheck %s
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; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 -disable-post-ra -regalloc=basic | FileCheck %s
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define void @test(float* %P, double* %D) {
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%A = load float, float* %P ; <float> [#uses=1]
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%B = load double, double* %D ; <double> [#uses=1]
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store float %A, float* %P
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store double %B, double* %D
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ret void
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}
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declare float @fabsf(float)
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declare double @fabs(double)
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define void @test_abs(float* %P, double* %D) {
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;CHECK-LABEL: test_abs:
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%a = load float, float* %P ; <float> [#uses=1]
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;CHECK: vabs.f32
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%b = call float @fabsf( float %a ) readnone ; <float> [#uses=1]
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store float %b, float* %P
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%A = load double, double* %D ; <double> [#uses=1]
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;CHECK: vabs.f64
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%B = call double @fabs( double %A ) readnone ; <double> [#uses=1]
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store double %B, double* %D
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ret void
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}
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define void @test_add(float* %P, double* %D) {
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;CHECK-LABEL: test_add:
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%a = load float, float* %P ; <float> [#uses=2]
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%b = fadd float %a, %a ; <float> [#uses=1]
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store float %b, float* %P
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%A = load double, double* %D ; <double> [#uses=2]
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%B = fadd double %A, %A ; <double> [#uses=1]
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store double %B, double* %D
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ret void
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}
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define void @test_ext_round(float* %P, double* %D) {
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;CHECK-LABEL: test_ext_round:
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%a = load float, float* %P ; <float> [#uses=1]
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;CHECK-DAG: vcvt.f64.f32
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;CHECK-DAG: vcvt.f32.f64
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%b = fpext float %a to double ; <double> [#uses=1]
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%A = load double, double* %D ; <double> [#uses=1]
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%B = fptrunc double %A to float ; <float> [#uses=1]
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store double %b, double* %D
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store float %B, float* %P
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ret void
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}
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define void @test_fma(float* %P1, float* %P2, float* %P3) {
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;CHECK-LABEL: test_fma:
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%a1 = load float, float* %P1 ; <float> [#uses=1]
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%a2 = load float, float* %P2 ; <float> [#uses=1]
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%a3 = load float, float* %P3 ; <float> [#uses=1]
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;CHECK: vnmls.f32
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%X = fmul float %a1, %a2 ; <float> [#uses=1]
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%Y = fsub float %X, %a3 ; <float> [#uses=1]
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store float %Y, float* %P1
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ret void
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}
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define i32 @test_ftoi(float* %P1) {
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;CHECK-LABEL: test_ftoi:
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%a1 = load float, float* %P1 ; <float> [#uses=1]
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;CHECK: vcvt.s32.f32
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%b1 = fptosi float %a1 to i32 ; <i32> [#uses=1]
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ret i32 %b1
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}
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define i32 @test_ftou(float* %P1) {
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;CHECK-LABEL: test_ftou:
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%a1 = load float, float* %P1 ; <float> [#uses=1]
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;CHECK: vcvt.u32.f32
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%b1 = fptoui float %a1 to i32 ; <i32> [#uses=1]
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ret i32 %b1
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}
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define i32 @test_dtoi(double* %P1) {
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;CHECK-LABEL: test_dtoi:
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%a1 = load double, double* %P1 ; <double> [#uses=1]
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;CHECK: vcvt.s32.f64
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%b1 = fptosi double %a1 to i32 ; <i32> [#uses=1]
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ret i32 %b1
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}
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define i32 @test_dtou(double* %P1) {
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;CHECK-LABEL: test_dtou:
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%a1 = load double, double* %P1 ; <double> [#uses=1]
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;CHECK: vcvt.u32.f64
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%b1 = fptoui double %a1 to i32 ; <i32> [#uses=1]
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ret i32 %b1
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}
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define void @test_utod(double* %P1, i32 %X) {
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;CHECK-LABEL: test_utod:
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;CHECK: vcvt.f64.u32
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%b1 = uitofp i32 %X to double ; <double> [#uses=1]
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store double %b1, double* %P1
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ret void
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}
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define void @test_utod2(double* %P1, i8 %X) {
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;CHECK-LABEL: test_utod2:
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;CHECK: vcvt.f64.u32
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%b1 = uitofp i8 %X to double ; <double> [#uses=1]
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store double %b1, double* %P1
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ret void
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}
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define void @test_cmp(float* %glob, i32 %X) {
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;CHECK-LABEL: test_cmp:
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entry:
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%tmp = load float, float* %glob ; <float> [#uses=2]
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%tmp3 = getelementptr float, float* %glob, i32 2 ; <float*> [#uses=1]
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%tmp4 = load float, float* %tmp3 ; <float> [#uses=2]
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%tmp.upgrd.1 = fcmp oeq float %tmp, %tmp4 ; <i1> [#uses=1]
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%tmp5 = fcmp uno float %tmp, %tmp4 ; <i1> [#uses=1]
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%tmp6 = or i1 %tmp.upgrd.1, %tmp5 ; <i1> [#uses=1]
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;CHECK: bmi
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;CHECK-NEXT: bgt
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br i1 %tmp6, label %cond_true, label %cond_false
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cond_true: ; preds = %entry
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%tmp.upgrd.2 = tail call i32 (...) @bar( ) ; <i32> [#uses=0]
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ret void
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cond_false: ; preds = %entry
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%tmp7 = tail call i32 (...) @baz( ) ; <i32> [#uses=0]
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ret void
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}
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declare i1 @llvm.isunordered.f32(float, float)
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declare i32 @bar(...)
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declare i32 @baz(...)
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define void @test_cmpfp0(float* %glob, i32 %X) {
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;CHECK-LABEL: test_cmpfp0:
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entry:
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%tmp = load float, float* %glob ; <float> [#uses=1]
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;CHECK: vcmp.f32
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%tmp.upgrd.3 = fcmp ogt float %tmp, 0.000000e+00 ; <i1> [#uses=1]
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br i1 %tmp.upgrd.3, label %cond_true, label %cond_false
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cond_true: ; preds = %entry
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%tmp.upgrd.4 = tail call i32 (...) @bar( ) ; <i32> [#uses=0]
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ret void
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cond_false: ; preds = %entry
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%tmp1 = tail call i32 (...) @baz( ) ; <i32> [#uses=0]
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ret void
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}
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