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1398e91b06
We can use a MOVSX16 here then rely on FixupBWInst to change to MOVSX32 if the upper bits are dead. With a special case to not promote if it could be turned into CBW. Then we can rely on X86MCInstLower to turn the MOVSX into CBW very late if register allocation worked out. Using MOVSX gives an opportunity to use the MOVSX as a both a copy and a sign extend since the input and output register aren't tied together. Differential Revision: https://reviews.llvm.org/D67192 llvm-svn: 371243
211 lines
5.5 KiB
LLVM
211 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_udivrem_zext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl %ah, %ecx
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; X32-NEXT: movb %al, z
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; X32-NEXT: movl %ecx, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_udivrem_zext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %ecx
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; X64-NEXT: movb %al, {{.*}}(%rip)
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: retq
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%div = udiv i8 %x, %y
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store i8 %div, i8* @z
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%1 = urem i8 %x, %y
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ret i8 %1
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}
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define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_urem_zext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl %ah, %eax
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; X32-NEXT: # kill: def $al killed $al killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_urem_zext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%1 = urem i8 %x, %y
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ret i8 %1
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}
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define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_urem_noext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: divb %cl
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; X32-NEXT: movzbl %ah, %eax
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; X32-NEXT: addb %cl, %al
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; X32-NEXT: # kill: def $al killed $al killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_urem_noext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %eax
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; X64-NEXT: addb %sil, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%1 = urem i8 %x, %y
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%2 = add i8 %1, %y
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ret i8 %2
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}
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define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_urem_zext64_ah:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl %ah, %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test_urem_zext64_ah:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %eax
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; X64-NEXT: retq
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%1 = urem i8 %x, %y
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%2 = zext i8 %1 to i64
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ret i64 %2
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}
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define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_sdivrem_sext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: idivb {{[0-9]+}}(%esp)
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; X32-NEXT: movsbl %ah, %ecx
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; X32-NEXT: movb %al, z
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; X32-NEXT: movl %ecx, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_sdivrem_sext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: idivb %sil
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; X64-NEXT: movsbl %ah, %ecx
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; X64-NEXT: movb %al, {{.*}}(%rip)
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: retq
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%div = sdiv i8 %x, %y
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store i8 %div, i8* @z
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%1 = srem i8 %x, %y
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ret i8 %1
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}
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define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_srem_sext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: idivb {{[0-9]+}}(%esp)
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; X32-NEXT: movsbl %ah, %eax
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; X32-NEXT: # kill: def $al killed $al killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_srem_sext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: idivb %sil
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%1 = srem i8 %x, %y
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ret i8 %1
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}
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define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_srem_noext_ah:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: idivb %cl
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; X32-NEXT: movsbl %ah, %eax
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; X32-NEXT: addb %cl, %al
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; X32-NEXT: # kill: def $al killed $al killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_srem_noext_ah:
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; X64: # %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: idivb %sil
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: addb %sil, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%1 = srem i8 %x, %y
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%2 = add i8 %1, %y
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ret i8 %2
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}
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define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
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; X32-LABEL: test_srem_sext64_ah:
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; X32: # %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: idivb {{[0-9]+}}(%esp)
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; X32-NEXT: movsbl %ah, %eax
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; X32-NEXT: movl %eax, %edx
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; X32-NEXT: sarl $31, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test_srem_sext64_ah:
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; X64: # %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: idivb %sil
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: cltq
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; X64-NEXT: retq
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%1 = srem i8 %x, %y
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%2 = sext i8 %1 to i64
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ret i64 %2
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}
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define i64 @pr25754(i8 %a, i8 %c) {
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; X32-LABEL: pr25754:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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; X32-NEXT: movzbl %ah, %ecx
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; X32-NEXT: movzbl %al, %eax
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; X32-NEXT: addl %ecx, %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: pr25754:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %ecx
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: addq %rcx, %rax
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; X64-NEXT: retq
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%r1 = urem i8 %a, %c
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%d1 = udiv i8 %a, %c
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%r2 = zext i8 %r1 to i64
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%d2 = zext i8 %d1 to i64
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%ret = add i64 %r2, %d2
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ret i64 %ret
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}
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@z = external global i8
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