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4cccff07f7
This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract. In particular this helps remove some unnecessary scalar->vector->scalar patterns. The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue. Reapplied after reversion at rL368660 due to PR42982 which was fixed at rGca7fdd41bda0. Differential Revision: https://reviews.llvm.org/D65887
129 lines
5.4 KiB
LLVM
129 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64
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define <3 x i16> @zext_i8(<3 x i8>) {
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; SSE3-LABEL: zext_i8:
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; SSE3: # %bb.0:
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; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %edx
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; SSE3-NEXT: # kill: def $ax killed $ax killed $eax
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; SSE3-NEXT: # kill: def $dx killed $dx killed $edx
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; SSE3-NEXT: # kill: def $cx killed $cx killed $ecx
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; SSE3-NEXT: retl
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;
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; SSE41-LABEL: zext_i8:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE41-NEXT: pinsrb $1, {{[0-9]+}}(%esp), %xmm0
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; SSE41-NEXT: pinsrb $2, {{[0-9]+}}(%esp), %xmm0
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; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
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; SSE41-NEXT: movd %xmm0, %eax
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; SSE41-NEXT: pextrw $1, %xmm0, %edx
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; SSE41-NEXT: pextrw $2, %xmm0, %ecx
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; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
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; SSE41-NEXT: # kill: def $dx killed $dx killed $edx
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; SSE41-NEXT: # kill: def $cx killed $cx killed $ecx
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; SSE41-NEXT: retl
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;
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; AVX-32-LABEL: zext_i8:
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; AVX-32: # %bb.0:
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; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX-32-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
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; AVX-32-NEXT: vmovd %xmm0, %eax
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; AVX-32-NEXT: vpextrw $1, %xmm0, %edx
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; AVX-32-NEXT: vpextrw $2, %xmm0, %ecx
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; AVX-32-NEXT: # kill: def $ax killed $ax killed $eax
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; AVX-32-NEXT: # kill: def $dx killed $dx killed $edx
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; AVX-32-NEXT: # kill: def $cx killed $cx killed $ecx
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; AVX-32-NEXT: retl
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;
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; AVX-64-LABEL: zext_i8:
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; AVX-64: # %bb.0:
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; AVX-64-NEXT: vmovd %edi, %xmm0
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; AVX-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
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; AVX-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
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; AVX-64-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
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; AVX-64-NEXT: vmovd %xmm0, %eax
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; AVX-64-NEXT: vpextrw $1, %xmm0, %edx
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; AVX-64-NEXT: vpextrw $2, %xmm0, %ecx
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; AVX-64-NEXT: # kill: def $ax killed $ax killed $eax
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; AVX-64-NEXT: # kill: def $dx killed $dx killed $edx
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; AVX-64-NEXT: # kill: def $cx killed $cx killed $ecx
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; AVX-64-NEXT: retq
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%2 = zext <3 x i8> %0 to <3 x i16>
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ret <3 x i16> %2
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}
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define <3 x i16> @sext_i8(<3 x i8>) {
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; SSE3-LABEL: sext_i8:
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; SSE3: # %bb.0:
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; SSE3-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE3-NEXT: shll $8, %eax
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; SSE3-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SSE3-NEXT: shll $8, %ecx
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; SSE3-NEXT: movd %ecx, %xmm0
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; SSE3-NEXT: pinsrw $1, %eax, %xmm0
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; SSE3-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE3-NEXT: shll $8, %eax
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; SSE3-NEXT: pinsrw $2, %eax, %xmm0
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; SSE3-NEXT: psraw $8, %xmm0
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; SSE3-NEXT: movd %xmm0, %eax
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; SSE3-NEXT: pextrw $1, %xmm0, %edx
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; SSE3-NEXT: pextrw $2, %xmm0, %ecx
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; SSE3-NEXT: # kill: def $ax killed $ax killed $eax
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; SSE3-NEXT: # kill: def $dx killed $dx killed $edx
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; SSE3-NEXT: # kill: def $cx killed $cx killed $ecx
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; SSE3-NEXT: retl
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;
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; SSE41-LABEL: sext_i8:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE41-NEXT: pinsrb $1, {{[0-9]+}}(%esp), %xmm0
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; SSE41-NEXT: pinsrb $2, {{[0-9]+}}(%esp), %xmm0
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; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
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; SSE41-NEXT: movd %xmm0, %eax
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; SSE41-NEXT: pextrw $1, %xmm0, %edx
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; SSE41-NEXT: pextrw $2, %xmm0, %ecx
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; SSE41-NEXT: # kill: def $ax killed $ax killed $eax
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; SSE41-NEXT: # kill: def $dx killed $dx killed $edx
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; SSE41-NEXT: # kill: def $cx killed $cx killed $ecx
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; SSE41-NEXT: retl
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;
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; AVX-32-LABEL: sext_i8:
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; AVX-32: # %bb.0:
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; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
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; AVX-32-NEXT: vpmovsxbw %xmm0, %xmm0
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; AVX-32-NEXT: vmovd %xmm0, %eax
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; AVX-32-NEXT: vpextrw $1, %xmm0, %edx
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; AVX-32-NEXT: vpextrw $2, %xmm0, %ecx
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; AVX-32-NEXT: # kill: def $ax killed $ax killed $eax
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; AVX-32-NEXT: # kill: def $dx killed $dx killed $edx
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; AVX-32-NEXT: # kill: def $cx killed $cx killed $ecx
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; AVX-32-NEXT: retl
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;
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; AVX-64-LABEL: sext_i8:
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; AVX-64: # %bb.0:
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; AVX-64-NEXT: vmovd %edi, %xmm0
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; AVX-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
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; AVX-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
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; AVX-64-NEXT: vpmovsxbw %xmm0, %xmm0
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; AVX-64-NEXT: vmovd %xmm0, %eax
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; AVX-64-NEXT: vpextrw $1, %xmm0, %edx
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; AVX-64-NEXT: vpextrw $2, %xmm0, %ecx
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; AVX-64-NEXT: # kill: def $ax killed $ax killed $eax
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; AVX-64-NEXT: # kill: def $dx killed $dx killed $edx
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; AVX-64-NEXT: # kill: def $cx killed $cx killed $ecx
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; AVX-64-NEXT: retq
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%2 = sext <3 x i8> %0 to <3 x i16>
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ret <3 x i16> %2
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}
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